[SI-LIST] Multiple SI/characterization engineer positions at Altera (San Jose, CA)

From: "Geping Liu" <GLIU@xxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Tue, 17 Jan 2006 10:28:21 -0800

The Altera Corporation, Characterization Group (Product Engineering) in
San Jose, CA has multiple, immediate openings for Signal
Integrity/Characterization Engineers. 
The job duties include characterizing complex FPGA with emphasis on high
performance IO interfaces with their noise properties. The candidates
will develop characterization strategies, plans, and schedules by
integrating different requirements from various engineering and business
departments.  The candidates will execute device characterization which
involves model extraction, simulation, hardware design bench
measurements, and data analysis. 

Qualifications include a BSEE or equivalent with a minimum of 4 years
experience. An in-depth knowledge of signal integrity is required.
Experience of simulation with CMOS circuits in transmission line
environments is required.  Good written and oral communication skills
are required.  Knowledge of mixed-signal circuits such as PLL, CDR, and
high-speed I/O buffers is a plus.  Knowledge of high-speed I/O protocols
such as PCI-Express, XAUI, and GigaBit Ethernet is desirable.  An MSEE
is a plus.

Please forward your resume and contact information to Geping Liu
gliu@xxxxxxxxxx or San Wong sanwong@xxxxxxxxxx

 

 


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[SI-LIST] Multiple SI/characterization engineer positions at Altera (San Jose, CA)

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