[SI-LIST] Model File
- From: Himanshu Arora <ha324005@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 11 Mar 2002 12:28:10 -0800 (PST)
Hello,
We are planning to use TSMC CMOS process for one of
our designs. I have a question regarding its model
file.
The Model file for Spice simulation contains three
different models, namely:
1. Nominal Device model
2. Native MOS device model
3. Medium Vt Device Model
Each of the above model file is binned ( bsed on L and
W) and the number of bins used are different for each
of them. I went through the process documentation but
still could not figure out when to use which of the
above model for simulation. Can anyone help me out
with the meaning of the above terms or give some
pointers to some documentation in case if these are
some generic terms?
Thanks and Regards
Himanshu Arora
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