[SI-LIST] Low noise electronics and Xilinx high-speed links
- From: "Andreas Kaeufl" <andreas_kaeufl@xxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 21 Jul 2004 20:51:17 +0200
Hi all,
I am about to start a design based on the Xilinx
Virtex-II Pro and I plan to use the RocketIO
transceivers for board-to-board communication through
and FR4 backplane.
On one side of the board is the Xilinx FPGA and the
rest will be full of ADCs sampling very sensitive
analog signals with 16-bit resolution (1 LSB = 76 micro
volts at the input of the ADC.)
On the one hand the transceivers run at 3.125Gbps and
at this frequency radiation can become a problem. But
on the other hand, the higher the frequency, the more
efficiently I can filter out any high frequency on the
analog electronics.
My questions are:
1) Is there any hope that my low-noise analog
electronics will work untroubled by the high-speed
links?
2) Apart from massive decoupling of the analog and
digital parts, and shielding the serial links inside
the backplane, is there any good hint I should follow?
Regards and thanks for your help,
Andreas
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