[SI-LIST] Lout of VRM
- From: "sogo_hsu" <sghsu55@xxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Wed, 14 Aug 2002 14:35:16 -0000
Hi SI Gurus,
Firstly, I have got lots of help from this forum; I have to say
thank you to all give me advises in advance. Recently, I had done
several simulation works regarding PDS design. We computed the
impedance of PDS including the model of VRM. Roughly said, the VRM is
almost three-phase type and with 1uH inductor type we adopted. That
is said, the equivalent output inductance is 0.333uH. The simulation
result indicated the impedance of PDS has a peak violates the
specification of target impedance at about 1 kHz. We proposed
dwindling the inductor from 1 uH to about 100 nH to match the
specification of target impedance. However, it is hard to find the
proper component to match the requirement. I have some questions
regarding the simulation work.
(1) What=A1=A6s the role of output inductor in VRM? It seems lower
output inductor of VRM makes up lower impedance of PDS. So, what=A1=A6s
the aftereffect if a low output inductor, even we shorten the output
inductor, was adopted?
(2) If we ignore the violation at about 1KHz due to the
=A1=A5high=A1=A6 inductor, what=A1=A6s happen in PDS design?
Thank you for your helps in advance.
Best regards,
Sogo Hsu
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