[SI-LIST] Re: Linear Regulator Problems

Chris, how slow is slow?  If you assert either a line or a load step, what 
does the recovery look like, ie characteristic freq of ringing, and # of 
cycles to diminish to 10% of the final value?

It sounds like the darn thing is conditionally stable.  The layout and 
capacitor choices can aggravate that making it unstable.

For fast turnarounds on little test circuits, I really like 
ExpressPCB.  About $60 gets you three little 2.5 x 3.8 two sided boards 
which is darn near perfect for prototyping little power supplies, 
amplifiers and such.  They turn around in one to two days.   For about 
$100.  you can get a couple of small four layer boards.  It definitely 
beats playing with Cu tape from Bishop Graphics.

Regards,


Steve.
At 09:10 AM 9/24/2004 -0400, Landrum, Chris wrote:
>Steve,
>
>No need for a picture.  I have dead-bugged a transistor on a board and
>then "wired" it in.  Input is a 12 AWG wire about 0.5in long (2) 10uF
>caps right at the pin.  Output is much better with the pin being
>directly soldered to the PCB.  The output cap is very close to the pin.
>I would immediately suspect the layout, however, if it were at fault, I
>would think I would see inductive voltage spikes on the input or
>something.  I don't see any misbehaving other than the slow response
>time.  Also, this very same regulator has been attempted before (i.e. a
>proper layout was completed) with the same, poor results.  However, this
>ckt works perfectly on the vendor's eval system. I am in the process of
>finishing a layout to implement the ckt, however I was hoping to have
>concrete evidence that it will work before I build boards.  I realize
>this is difficult without a proper layout, but it would help give me
>that warm and fuzzy feeling inside.
>
>-----Original Message-----
>From: steve weir [mailto:weirsp@xxxxxxxxxx]=20
>Sent: Friday, September 24, 2004 8:59 AM
>To: Landrum, Chris
>Cc: si-list@xxxxxxxxxxxxx
>Subject: Re: [SI-LIST] Re: Linear Regulator Problems
>
>Chris,  if you cannot get models, then you can set-up some
>characterization=20
>to obtain the response.  I think one of the links posted a bit earlier=20
>pointed to an article that has examples for the case of the once
>ubiquitous=20
>LM317.
>
>When you say that the layout has changed for the worse how bad are we=20
>talking about?  Can you send me a picture of just that section without=20
>getting into trouble?
>
>Regards,
>
>Steve.
>At 08:51 AM 9/24/2004 -0400, Landrum, Chris wrote:
> >Steve,
> >
> >Thanks for the suggestions.  I most likely can get models of the
> >transistor, but I assume I will need a model of the internal error amp,
> >etc.. I would love to run this through Spice, however, I do not have a
> >model for the "feedback control".  As you have guessed, my regulator is
> >home grown, however it is within a custom ASIC designed by another
> >vendor.  I will attempt to get models for it, but it is probably not
> >likely I will be able to get one. =3D20
> >
> >Thanks.
> >
> >Chris Landrum
> >PCBA Design Engineer
> >Maxtor Corporation
> >333 South Street
> >Shrewsbury, MA  01545
> >508-770-2282 (d)
> >
> >-----Original Message-----
> >From: steve weir [mailto:weirsp@xxxxxxxxxx]=3D20
> >Sent: Thursday, September 23, 2004 5:42 PM
> >To: Landrum, Chris
> >Cc: si-list@xxxxxxxxxxxxx
> >Subject: Re: [SI-LIST] Linear Regulator Problems
> >
> >Chris, some more detailed answers-
> >At 10:49 AM 9/23/2004 -0400, Landrum, Chris wrote:
> > >Alright, I'll start with a new question.  Based on the recent emails,
>I
> > >have no idea whether or not this belongs in this forum, but I will
>ask
> > >anyway.
> > >
> > >
> > >I am working on a linear regulator that is exhibiting very poor
> > >transient response.  At first I assumed that the amount of output
> > >capacitance was to blame.  After dropping the amount of output
> > >capacitance, I found little change.  I have another board that uses
>the
> > >same circuit (same NPN-BJT, different decoupling, same load, better
> > >layout) which does not have the problem.  I attempted to mimic the
>good
> > >board's output decoupling, but the result was the same.
> > >
> > >
> > >
> > >
> > >I then noticed that the good board was using a tantalum output
> > >capacitor, while I am using Ceramic.  I am aware that tantalums do
>have
> > >a higher ESR than ceramics, so I attempted to use a tantalum.  The
> > >result was that the base started to oscillate (became un-stable).  I
> > >then tried adding a resistor in series with a ceramic cap to
>"simulate"
> > >a higher ESR value.  This actually seemed to help a little, but not
> > >enough to declare any type of success.  Since the base does not
> > >oscillate when using the ceramics, I assume that the regulator is
> > >stable.
> > >
> >
> >Not just any value will do.  Also, the operating point of your
> >transistor=3D20
> >matters.  Have you put this through SPICE?
> >
> > >
> > >
> > >I began to suspect a problem with base drive current.  The transistor
>I
> > >am using is an NPN that has a Hfe of 100 at Vce =3D3D 2V and Ic of =
>1A.
>=3D
> >My
> > >measured transient is less than 1A (~850mA).  The base driver is
> >capable
> > >of sourcing 20mA.  I am using 3.3V to make 1.2V.  With my
>calculations,
> > >I don't see a problem with base drive vs. gain.
> > >
> > >
> > >
> > >Some questions:
> > >
> > >What else might be contributing to my slow response times?
> > >
> > >Does anyone have a suggestion for obtaining an accurate bode plot of
>a
> > >linear regulator freq response?  I would like to figure out a way to
> > >check phase margin.
> >
> >
> >If you have models for the transistors, and know your operating
> >currents,=3D20
> >this is straightforward in SPICE.  You can also do it the old fashioned
> >way=3D20
> >with graph paper if you account for the operating point(s) of your
> >transistor.
> >
> >
> > >
> > >
> > >On the same topic... I have learned that a good method for estimating
> > >the variety of decoupling caps required in a PDS is to look at the
> > >problem in the freq domain.  Based on my max transient, I have
> > >calculated that I would need about 30uF of capacitance on the output.
> > >But this contradicts what is recommended on the output of a linear
> > >regulator doesn't it?  Most of the time, only values between 4.7uF
>and
> > >10uF are used.  Wouldn't 30uF on the output slow the response time?
>In
> > >my circuit, I have noticed the circuit does respond faster with less
> > >capacitance, but the overall ripple is greater....   What is the best
> > >way to balance these conflicting requirements BEFORE I get in the
>lab?
> >
> >Yes, a bigger capacitor does slow down the response, but it lowers
>the=3D20
> >amplitude as well.  A problem can occur when the compensated
>amplifier=3D20
> >response which has inductive characteristics, crosses the =
>capacitor=3D20
> >response.  This is the evil anti-resonance.  A really big, low ESR=3D20
> >capacitor and an amplifier with a low frequency audio pole can result
>in
> >
> >nasty behavior down in the low KHz.
> >
> >I assume that you are rolling your own regulator due to cost=3D20
> >considerations.  Since you will be mass producing, you really must
>push=3D20
> >this through SPICE and do a Monte-Carlo analysis for your four corners,
> >or=3D20
> >expect to see unwelcome surprises.  In a plug for some of those ICs
>that
> >
> >you probably don't want to spend money on, the people at LTC, Maxim,
> >etc,=3D20
> >have solved the problems that you are dealing with.  LTC has a very
>nice
> >
> >low dropout linear controller in an SO8.  You supply the external=3D20
> >FET.  These were developed for PII systems and have closed-loop
>response
> >
> >out to 1MHz or better.
> >
> > >
> > >
> > >Thanks.
> > >
> > >Chris
> > >
> > >
> > >
> > >
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