[SI-LIST] Re: Linear Regulator Problems
- From: "giancarlo guida" <gguida@xxxxxxxxxx>
- To: <chris_landrum@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 23 Sep 2004 17:13:12 +0200
----- Original Message -----
From: "Landrum, Chris" <chris_landrum@xxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Sent: Thursday, September 23, 2004 4:49 PM
Subject: [SI-LIST] Linear Regulator Problems
Alright, I'll start with a new question. Based on the recent emails, I
have no idea whether or not this belongs in this forum, but I will ask
anyway.
I am working on a linear regulator that is exhibiting very poor
transient response. At first I assumed that the amount of output
capacitance was to blame. After dropping the amount of output
capacitance, I found little change. I have another board that uses the
same circuit (same NPN-BJT, different decoupling, same load, better
layout) which does not have the problem. I attempted to mimic the good
board's output decoupling, but the result was the same.
I then noticed that the good board was using a tantalum output
capacitor, while I am using Ceramic. I am aware that tantalums do have
a higher ESR than ceramics, so I attempted to use a tantalum. The
result was that the base started to oscillate (became un-stable). I
then tried adding a resistor in series with a ceramic cap to "simulate"
a higher ESR value. This actually seemed to help a little, but not
enough to declare any type of success. Since the base does not
oscillate when using the ceramics, I assume that the regulator is
stable.
I began to suspect a problem with base drive current. The transistor I
am using is an NPN that has a Hfe of 100 at Vce = 2V and Ic of 1A. My
measured transient is less than 1A (~850mA). The base driver is capable
of sourcing 20mA. I am using 3.3V to make 1.2V. With my calculations,
I don't see a problem with base drive vs. gain.
Some questions:
What else might be contributing to my slow response times?
Does anyone have a suggestion for obtaining an accurate bode plot of a
linear regulator freq response? I would like to figure out a way to
check phase margin.
On the same topic... I have learned that a good method for estimating
the variety of decoupling caps required in a PDS is to look at the
problem in the freq domain. Based on my max transient, I have
calculated that I would need about 30uF of capacitance on the output.
But this contradicts what is recommended on the output of a linear
regulator doesn't it? Most of the time, only values between 4.7uF and
10uF are used. Wouldn't 30uF on the output slow the response time? In
my circuit, I have noticed the circuit does respond faster with less
capacitance, but the overall ripple is greater.... What is the best
way to balance these conflicting requirements BEFORE I get in the lab?
Thanks.
Chris
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