[SI-LIST] Help for PCB stackup!
- From: Kent Wu 947 <kent_wu@xxxxxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Fri, 27 Dec 2002 18:01:00 +0800
Every body
I get a problem for PCB stackup, and I can't make the successful =
stackup.
The original PCB stack data follows as below
Layer Material Type Dielectric Thickness Trace Width Finished Cu
thickness Dielectric Constant Impedance (Ohm) Description=09
1 Conductive 7 1.60 50 Component
Side=09
Dielectric 4.50
4.2 Core/Pre-preg=09
2 Conductive 0.70 GND
Plane=09
Dielectric 8.40
4.2 Core/Pre-preg=09
3 Conductive 5 0.70 56 (Unpopulated)
Rambus Layer=09
Dielectric 7.00
4.2 Core/Pre-preg=09
4 Conductive 0.70 Vcc
Plane=09
Dielectric 5.00
4.2 Core/Pre-preg=09
5 Conductive 5 0.70 50 Signal
Layer=09
Dielectric 4.00
4.2 Core/Pre-preg=09
6 Conductive 5 0.70 50 Signal
Layer=09
Dielectric 5.00
4.2 Core/Pre-preg=09
7 Conductive 0.70 Vcc
Plane=09
Dielectric 7.00
4.2 Core/Pre-preg=09
8 Conductive 5 0.70 56 (Unpopulated)
Rambus Layer=09
Dielectric 8.40
4.2 Core/Pre-preg=09
9 Conductive 0.70 GND
Plane=09
Dielectric 4.50
4.2 Core/Pre-preg=09
10 Conductive 7 1.60 50 Solder
Side=09
Dielectronic thickness, trace width and finished Cu thickness unit are =
mile.
Now I want to change the stackup to follow the conditions as below:
a) Layer 3 and Layer 8 don't change, because RAMBUS signals in those
layers.
b) The PCB's thickness doesn't modify. The total thickness is 1.6mm =
=A1=D310%
(62.4mil =A1=D310%).
c) I have to rout traces impedance for 75 ohm in any layer except =
layer 3
and layer 8.
Does any one know the solution?
Best regards
Kent Wu
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