[SI-LIST] FW: Electrical Requirements for Packaging class
- From: "Jin Zhao" <jzhao@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Tue, 25 Jul 2006 11:01:51 -0700
FYI, since the SI-list does not accept the attachment, I convert it into
plain text.
Electrical Requirements for Microelectronic Packaging (Engr 242), Fall 2006
SJSU College of Engineering
Course Description:
As clock speeds increase in digital and communication circuits, Signal
Integrity has become very critical both on-chip and off-chip. This course
will deal with Signal Integrity issues in IC packages and Printed Circuit
Boards (PCBs). Starting with RC, RL, and RLC circuits, basic circuit
analysis will first be introduced. Partial Element Equivalent Circuit (PEEC)
as an important means of package modeling is then presented along with its
electromagnetic interpretations. Various kinds of drivers and receivers
using nonlinear circuit elements will be considered next followed by
interconnect modeling and phenomena related to transmission lines such as
reflections, delays, and crosstalk. Analysis and termination methods for
differential pair are also covered. Design of Power Delivery Systems (PDS)
and related topics such as Simultaneous Switching Noise (SSN) and decoupling
capacitor placement will next be described. Selected topics on the system
level simulation may include IBIS models for buffers, S-parameter models for
interconnection channels, as well as package characterization by EM solvers.
Measurements using Network Analyzers and TDRs will be introduced. The
circuit simulator SPICE will be used extensively. Where possible, public
domain EM solvers such as FASTCAP and FASTHENRY will also be used.
Prerequisites:
Graduate standing; BS in engineering, chemistry or physics; Consent of
instructor.
Times:
Aug 26 through Dec 16, 2006 (Saturdays) 9:00 a.m. - 12:00 noon; Room: E 340
Instructor:
Jin Zhao, Ph.D., Sigrity, Inc. (email: jzhao@xxxxxxxx)
Enrollment Info:
For those not enrolled in SJSU's graduate program, this course may be taken
through SJSU's Open University. The cost is approximately $635 + cost of
textbook for the 15 week course. For early enrollment please contact the
SJSU Continuing Education Office at (408) 924-2670. Enrollment during the
first class period will also be facilitated.
For further information contact:
Dr. Guna Selvaduray at SJSU; Tel: (408) 924-3874; FAX: (408) 924-4057;
email: gunas@xxxxxxxxxxxxxx
Thanks,
Jin
________________________________
From: Guna Selvaduray [mailto:gunas@xxxxxxxxxxxxxx]
Sent: Monday, July 24, 2006 6:43 PM
To: Selvaduray, Guna
Subject: Electrical Requirements for Packaging class
Dear Friends and Colleagues,
During the Fall 2006 semester we will be offering engr 242 - Electrical
Requirements for Microelectronic Packaging. The attachment provides more
details on the class. I thought you might find this class both interesting
and useful. I would also appreciate it if you could please forward this
announcement to anybody else who you think might be interested.
Thank you very much for your continued support of our programs at SJSU.
Best regards,
Guna Selvaduray
****************************************************************************
****************************************************************************
***************************************
Guna Selvaduray, Ph.D.
Tel: (408) 924-3874
Professor and Graduate Coordinator
Fax: (408) 924-4057
Chemical & Materials Engineering Department
San Jose State University
San Jose, CA 95192-0082
Home Page: http://www.sjsu.edu/faculty/selvaduray
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******************************************************************
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