[SI-LIST] Re: Electroless Ni-Au Plating impact on microstrip losses
- From: "Moreira, Jose" <jose.moreira@xxxxxxxxxx>
- To: "Scott McMorrow" <scott@xxxxxxxxxxxxx>, "silist" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 26 Aug 2010 17:58:44 -0500
In the paper "PCB Loadboard Design Challenges for Multi-Gigabit Devices in
Automated Test Applications" presented at Designcon 2006 there is a comparison
of the measured loss of a 19 mil microstrip trace with different surface
finished including thin and thick gold plating. The results are also presented
in the just launched book "An Engineer's Guide to Automated Testing of
High-Speed Interfaces"
Another paper on this topic is:
G. Brist, D. Cullen, D. Luttrull, and J. Martin, ?Reduction of High-Frequency
Signal Loss
through the Control of Conductor Geometry and Surface Metallization,?
International
Conference of the Surface Mount Technology Association (SMTA), 2002.
I hope this is of some help.
Jose
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx on behalf of Scott McMorrow
Sent: Thu 8/26/2010 5:40 PM
To: silist
Subject: [SI-LIST] Electroless Ni-Au Plating impact on microstrip losses
Sorry about that. This is the question I sent out.
Is anyone aware of any published research on Ni-Au plating over
Microstrip and the impact on losses other than:
"Ni-Au Surface Finish Effects on RF Performance", D. Staiculescu, J.
Laskar, J. Mendelsohn, E. Sweetman, D. Rudy and I. Artaki , IEEE MTT-S
Digest, 1999, pp 1909-1912.
--
Scott McMorrow
Teraspeed Consulting Group LLC
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