[SI-LIST] Differential delay line sim models

  • From: "Bastola, Subas" <subas.bastola@xxxxxxxxx>
  • To: Signal Integrity Mail Group <si-list@xxxxxxxxxxxxx>
  • Date: Mon, 27 Aug 2001 15:05:15 -0700

I am using Thin-Film's differential delay lines for HSTL clock length
matching. I am wondering if any one knows how to make  a good model of the
delay lines for use in HSPICE or dml (SpecctraQuest).

regards,
Subas Bastola
Intel Corporation
Santa Clara

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