[SI-LIST] Re: Decoupling for PLL (continued)
- From: steve weir <weirsp@xxxxxxxxxx>
- To: zhang_kun@xxxxxxxxxx,
- Date: Fri, 03 Sep 2004 09:48:12 -0700
Zhankun, 333KHz sounds suspiciously like the primary frequency of your
switching power supply. If you did not design your filter properly, then
the noise at the PLL Vcc from the power supply could easily be worse,
rather than better. Similarly, the 333KHz may align to the cut-off
frequency of your filter and it may well be peaking.
Steve
At 01:53 PM 9/3/2004 +0800, Zhangkun wrote:
>Dear all
>Recently, I have done some measurement. It is found that when the
>bead(inductor) is used, the power ground noise at 333KHz from VRM is
>larger. There is some noise near the clock frequency points.
>
>For example, the output clock of PLL is 50MHz. At 50.333MHz and 49.667MHz,
>there is noise, which is in proportion to the noise at 333KHz. Maybe the
>PLL modulates the noise of VRM into the output clock.
>
>Is there any SPICE model for PLL?
>
>Best Regards
>
>Zhangkun
>2004.9.3
>
>
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