[SI-LIST] DDR2 Clock and DQS Lines

From: Kenny Frohlich <kenny_frohlich@xxxxxxxxx>
To: si-list@xxxxxxxxxxxxx
Date: Tue, 26 Dec 2006 19:56:46 -0800 (PST)

Hi All,
  I understand that DQ and DQM lines need to match length with DQS lines, and 
Addr/Control lines need to length match with clocks.  But do DQS lines need to 
length match with clocks?
  In AMD design guidelines, they specifies that DQS lines need to length match 
with DDR2 clocks.  But is this really a requirement (industry standard)?
   
  Thanks,
  Kenny
   
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Follow-Ups:

[SI-LIST] Re: DDR2 Clock and DQS Lines
From: Dhavale Bipin-abd026

[SI-LIST] Re: DDR2 Clock and DQS Lines
From: Peterson, James F \(EHCOE\)

[SI-LIST] Re: DDR2 Clock and DQS Lines
From: Kai Keskinen

[SI-LIST] DDR2 Clock and DQS Lines

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