[SI-LIST] Re: DDR point to point termination

  • From: "Landrum, Chris" <chris_landrum@xxxxxxxxxx>
  • To: <arich1970@xxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 13 Jul 2004 13:01:52 -0400

I have implemented a point to point DDR interface (200MHz) using series
resistors located in the middle of the data traces.  I have seen the
same app note you speak of requiring the trace lengths to be less than
2in, which seems to work well in my application. =20

However, you describe a DDR interface consisting of 4 devices.  This is
not point-to-point as the devices will share data lines.  This interface
should be simulated.



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Aric Hadav
Sent: Tuesday, July 13, 2004 11:24 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] DDR point to point termination

Hi,

I'm designing an embedded system with DDR. I'm using a CPU connected to
an=20
on board four 16 bit DDR devices (no DIMM).
I have 2 questions though -
1. can I use only a series termination on the data bus (I saw a few AN
that=20
state that if the disctance between the controller and the DDR IC's is
upto=20
2" its ok). has anyone did it with a 200MHz clock ?
2. since the address and control lines operate in half the data rate and
the=20
DDR controller is very  lightly loaded (only 4 chips) can I use only
series=20
termination for address and control ? has anyone did it with good
resaults ?

thanks,

  Aric

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 =20

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