[SI-LIST] Re: About power ripple test
- From: steve weir <weirsi@xxxxxxxxxx>
- To: Han Li <jasonleehan@xxxxxxxxx>
- Date: Tue, 10 Jun 2008 05:58:24 -0700
This was recently discussed. Depending on how much capacitance is in
the package, either on the substrate and/or on the die, the IC package
forms a low-pass filter. More than 2-3X beyond the cut-off frequency
very little of what happens on the PCB is seen by the IC die. In those
cases an IC manufacturer can reasonably specify looking at the PCB power
rail through a low pass filter of some specification.
Steve.
Han Li wrote:
> Hi experts,
> I have a question on power ripple test, though it may not be very
> revelant to the list.Some ICs usually require a spec on power ripple ,say,
> 50mv p-p. When we do the ripple test, oscilliscople is set to band-limit
> mode, like 20Mhz band.
> If a band-limit test configuratnio is necessary? Assume we have a ic(like
> DDR SDRAM) runs 166MHz, won't this togglling frequency contribute to the
> ripple test resule?
> I guses a band-limit configuration can not lead to worst-case result which
> we needed.
> Would anyone kindly provide some advice on this? Reference or links will be
> highly appreciated.
>
> Thanks!
>
>
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