[SI-LIST] About power ripple test
- From: "Han Li" <jasonleehan@xxxxxxxxx>
- To: "SI LIST" <si-list@xxxxxxxxxxxxx>
- Date: Tue, 10 Jun 2008 16:26:05 +0800
Hi experts,
I have a question on power ripple test, though it may not be very
revelant to the list.Some ICs usually require a spec on power ripple ,say,
50mv p-p. When we do the ripple test, oscilliscople is set to band-limit
mode, like 20Mhz band.
If a band-limit test configuratnio is necessary? Assume we have a ic(like
DDR SDRAM) runs 166MHz, won't this togglling frequency contribute to the
ripple test resule?
I guses a band-limit configuration can not lead to worst-case result which
we needed.
Would anyone kindly provide some advice on this? Reference or links will be
highly appreciated.
Thanks!
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