[SI-LIST] Re: AW: Ground vias around signal via

  • From: <Wolfgang.Maichen@xxxxxxxxxxxx>
  • To: <ricbrook@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 17 Oct 2014 08:00:52 +0000

To add some more "meat" as requested: I ran some simple simulations in Sonnet 
Lite and would like to share the results:
A 3D view is here: 
http://pdamusician.com/electronics/return_via_two_vias_3d_view.gif

Simulation space is a 1 inch x 1 inch metal box; this is large compared to the 
trace widths and dielectric thicknesses (see below) so even though the return 
current can run through the box walls they are far enough away to not be very 
effective at high frequencies (several GHz).

So layer setup is (limited by Sonnet Lite's restriction to 2 inner layers):

Top cover (metal)
Top dielectric (eps_r = 4, thickness 12 mils)
Signal Layer 0 (metal)
Center dielectric (eps_r = 4, thickness 100 mils)
Signal Layer 1 (metal)
Bottom dielectric (eps_r = 4, thickness 12 mils)
Bottom cover (metal)

Top and bottom cover act as reference (return) planes. The center dielectric 
being much thicker than top and bottom dielectric assures that a trace on layer 
0 mostly couples (= has return current flowing in) the top cover, and a trace 
on layer 1 mostly couples to the bottom cover. So the return current will need 
to transition from top cover to bottom cover at the box center.

I set up the signal path with a trace entering on the left on layer 0, 
transitioning to a trace on layer 1 in the center of the box. Trace width is 20 
mils which gives a characteristic impedance close to 50 Ohms, so with a 
"proper" return path one would expect only very low insertion losses at all 
frequencies.

I added two return vias between top and bottom cover, close to the signal via 
(I did not spend time to optimize the via positions, just placed them at 20 mil 
spacing from the signal via on either side). Here are S11 and S21 (return and 
insertion loss) from 10 MHz to 20 GHz:

http://pdamusician.com/electronics/return_via_two_vias_sparams.gif

Performance is very acceptable (S21 better than -3dB) up to > 10 GHz, above 
that some box resonances are visible.

Now I repeated the simulation, but with the vias placed further away (250 mils 
on either side) and completely removed (so the box walls will be the only way 
for the return current). A 3D view of the wide spacing is here:

http://pdamusician.com/electronics/return_via_two_vias_wide_spacing_3d_view.gif

The results are strikingly worse in both cases:

http://pdamusician.com/electronics/return_via_two_vias_wide_spacing_sparams.gif
http://pdamusician.com/electronics/return_via_no_vias_sparams.gif

Performance limit drops to < 4 GHz and there is almost complete reflection (S11 
approx. 0dB) over wide ranges above that.

I would say this demonstrates the importance of having return vias close by 
quite impressively. It also shows that you can get away with an "ill defined" 
return path (box wall return rather far away, approx. 0.5 inches in this case, 
which is still not excessively long!) for low frequencies, in the present case 
meaning a few 100 MHz. This is what others have stated previously (think 
"lambda/10" guideline).

So yes, "it depends", but I would certainly dispute a blanket statement that 
return vias are never necessary or useful.

Anyone wanting to run their own simulations, here are my Sonnet model files 
(they need only ~1 MB simulation memory so can easily run even on the 
non-registered free version):

http://pdamusician.com/electronics/return_via_two_returns.son
http://pdamusician.com/electronics/return_via_two_returns_wide_spacing.son
http://pdamusician.com/electronics/return_via_none.son

Wolfgang







-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Rick Brooks (ricbrook)
Sent: Thursday, October 16, 2014 9:13 PM
To: leeritchey@xxxxxxxxxxxxx; scott@xxxxxxxxxxxxx; 
Yishan.Li@xxxxxxxxxxxxxxxxxxxx
Cc: Gert.Havermann@xxxxxxxxxxx; aaditya.kandibanda@xxxxxxxxx; si-list
Subject: [SI-LIST] Re: AW: Ground vias around signal via

The counter argument is that anyone who says that GND stitching vias do nothing 
or are not needed under any conditions, is also suggesting a "rule" which 
should be proved for all possible cases.
Honestly, I do not remember anyone saying on this thread that having close GND 
stitching vias is required in every conceivable place or scenario.
I have certainly seen specific designs where the location and number of GND 
stitching vias made a big difference with signals containing even mode.
Obviously, that does not mean they are a must have for every via on every board 
that is built or shipped.
It also does not mean that I am willing to share the actual data, because, like 
others, there may be confidential aspects to it.

I have also seen conditions where right angle bends on traces creates no 
visible problems.
That does not mean you should use right angle bends, or that there aren't an 
infinite number of cases where right angle bends would be a disaster.

As always, "it depends"

This forum is for people to put forth their ideas and experience.
I, for one, welcome their comments, with or without proof.
cheers




-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On 
Behalf Of Lee
Sent: Thursday, October 16, 2014 10:16 AM
To: scott@xxxxxxxxxxxxx; Yishan.Li@xxxxxxxxxxxxxxxxxxxx
Cc: Gert.Havermann@xxxxxxxxxxx; aaditya.kandibanda@xxxxxxxxx; si-list
Subject: [SI-LIST] Re: AW: Ground vias around signal via

This discussion seems to be terribly theoretical.  We all know that there are 
thousands, perhaps tens of thousands of assemblies shipped every day with 
differential signals as high as 28 Gb/S on them that work just fine without the 
need to put in "ground vias" nearby.

What comes to my mind when I read discussions such as this is that old Burger 
King commercial  where Clara Peller asks "where's the beef?"

For all of the postulated problems mentioned in these discussions, "where's the 
proof?"

We do too much speculating on this forum and not enough proving!

My position on this whole thing as well as many others that appear on this 
discussion group is, if you are going to put forth a rule, be prepared to offer 
the proof that the rule is valid as well as where it is valid.  If you are not 
prepared to do this, it is a disservice to those who are asking for advice to 
make such a posting.

-----Original Message-----
From: Scott McMorrow
Sent: Thursday, October 16, 2014 3:29 AM
To: Yishan.Li@xxxxxxxxxxxxxxxxxxxx
Cc: Gert.Havermann@xxxxxxxxxxx ; aaditya.kandibanda@xxxxxxxxx ; si-list
Subject: [SI-LIST] Re: AW: Ground vias around signal via

Gert has good advice about the distance of the ground via to the signal via, 
but I would like to modify it a bit.  A well-referenced set of ground planes 
will have ground stitch vias that are separated by no more than 1/10 the 
wavelength of the Nyquist frequency of the highest differential bit rate, or 
the bandwidth of the signal edge rate of the fastest single ended driver.
So for some numbers in the English system.

Let Dk = 4
Tdelay = 170 ps/inch

For DDR3/4 with 100 ps driver edge rates BW = .35/100ps = 3.5 GHz lambda = 285 
ps
1/10 lambda = 28.5 ps
In Dk = 4 ground vias should be separated by a maximum of 167 mil to maintain a 
good return path for these singled-ended DDR signals.

For 10 Gbps
Nyquist is 5 GHz
lambda = 200 ps
1/10 lambda = 20 ps117
In Dk = 4 ground vias should be separated by a maximum of  117 mil for 10 Gbps 
signalling to maintain a good return path.

For 28 Gbps
Nyquist is 14 GHz
lambda is 71 ps
1/10 lambda is 7.1 ps
In Dk = 4 ground vias should be separated by a maximum of 42 mil for 28 Gbps 
signalling.

These recommendations apply to the region in proximity of the signal transition 
vias.  They serve to tie the ground cavities together, provide shielding for 
the power/ground cavities, eliminate resonances in the signal passband and 
first harmonic, and reduce via-to-via crosstalk.  If the signal transition is 
at the balls of a semiconductor device, or in the pin field of a connector, 
there are "usually" enough ground vias in these regions to meet these 
requirements.  If that is the case, then no additional grounds are required.  
But, there are often cases that we encounter at Teraspeed Consulting where 
these rules are violated.  Here are some common areas to look at.

Via transitions around dc blocking capacitors.

Boards with outer layer buildup microvias, where drilled vias do not carry the 
package or connector grounds down through the board.

Areas with asymmetric stripline crossing power splits on the distant plane side 
of the stripline (the stripline is close to ground.)

In all these regions it is necessary to close the return path loop with ground 
vias as described above.  Use the above as a guide to current and future 
designs.

best regards,

Scott





Scott McMorrow
Teraspeed® Consulting - A Division of Samtec
16 Stormy Brook Rd
Falmouth, ME 04105
(401) 284-1827 Business
http://www.teraspeed.com

On Thu, Oct 16, 2014 at 3:39 AM, LI Yishan <Yishan.Li@xxxxxxxxxxxxxxxxxxxx>
wrote:

> Hi, Aaditya:
>   According to 3D simulation, ground vias around signal via deeply 
> effect high frequency impedance. If your signal is low speed signal, 
> it seems the ground vias are not necessary.
>
> Best regards
> Li Yishan
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx 
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Havermann, Gert
> Sent: 2014年10月16日 14:59
> To: aaditya.kandibanda@xxxxxxxxx; si-list
> Subject: [SI-LIST] AW: Ground vias around signal via
>
> Aaditya: My opinion is, if we have a proper return path,  they are not 
> necessary.
>
> -> As Wolfgang said, GND vias are needed for proper return path 
> -> because
> without any GND via there will be no proper return path. You don't 
> have to put multiple of those around the signal via. with proper 
> placement one is enough even for very high speeds.
>
> Aaditya: Any situations they are useful other than shielding?
>
> -> Placing many stitching vias doesn't necessarily provide any shielding.
> That’s an old Myth. Take a look at waveguide filters. The placement 
> of screws into the dielectric (air) looks and functions very similar 
> to a PCB where the energy also travels in the dielectric. Stitching 
> vias can act as a filter, meaning that some frequencies are not 
> shielded but guided to the outside.
>
> Aaditya: How will they help? When do we need them?
>
> -> As already said, use GND vias to provide a proper GND return. as a 
> -> rule
> of thumb there should be a return via within the range of 1/8 
> wavelength
> (Nyquist) to the signal via.
>
> BR
> Gert
>
>
> ----------------------------------------
> Absender ist HARTING Electronics GmbH, Marienwerderstraße 3, D-32339 
> Espelkamp; Registergericht: Amtsgericht Bad Oeynhausen; Register-Nr.: 
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> Edgar-Peter Düning, Dipl.-Ing. Torsten Ratzmann, 
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>
> -----Ursprüngliche Nachricht-----
> Von: si-list-bounce@xxxxxxxxxxxxx 
> [mailto:si-list-bounce@xxxxxxxxxxxxx]
> Im Auftrag von Aaditya K
> Gesendet: Mittwoch, 15. Oktober 2014 19:42
> An: si-list
> Betreff: [SI-LIST] Ground vias around signal via
>
> Hello Experts,
> I have a question on ground vias placement around signal via.
>
> My opinion is, if we have a proper return path,  they are not necessary.
> Am I correct?
>
> Any situations they are useful other than shielding?
>
> How will they help? When do we need them?
>
> Please help.
>
> Thanks
> Aaditya
>
>
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