Chris, As you and others pointed out, there may be several reasons to move away from the magical 50-ohm interconnect impedance. Which, by the way, was short lived: you may recall that for some time high-speed differential interconnects favored 150 Ohms. Attenuation contribution from a given (frequency dependent) series resistance goes up if we lower the characteristic impedance. This tells us that higher impedance would be better. Higher characteristic impedance, with a fixed conductor (trace or cable center-wire) cross section geometry, will require larger spacings. Eventually this would grow the board thickness and cable diameter. So when density is very important, we have to compromise attenuation and lower the characteristic impedance to pack conductors closer. As it was also mentioned already, if the process is done correctly, 85-ohm or other impedance creates no major problem from a testing point of view. There will be a minor degradation of available dynamic range, ignorable most of the time. When you have a chain of mixed impedances, because you have customer boards with either 100 ohm or 85 ohm traces, you can go through the calculations and see how much margin you loose. As speeds go up, it can be painful, but usually more because of additional discontinuities at the connectors. Also, when you have segments of different impedances, you also need to check the possible length combinations, as the multiple reflections will create resonances, which shows up as periodical loss of margin as you change your data bit rate. Regards, Istvan Novak Oracle On 6/17/2011 1:08 PM, Chris Padilla (cpad) wrote: > Folks, > > I'm wondering if some of your higher speed designs are considering > moving to a< 100 ohm differential Zo? > > We know that a 50 ohm via is difficult to make and the connector vendors > have equal trouble trying to reach 100 ohm differential on their high > speed connectors. Going to< 100 should make it easier to have lower > crosstalk and matched impedance to improve return loss, possibly better > signal to noise ratio, and wider traces could yield slightly lower loss > (depends on how you adjust the PCB geometries to reach 85 ohm, of > course). > > A negative is the 50 ohm test equipment environment. One will have 42.5 > ohm on their board. Can this be easily dealt with? Of course, most > chips are design with 100 ohm in mind so finding chips designed at > something else could be difficult. > > I just wonder if the headache of moving off-standard is worth it or not. > I'm curious what the experience of folks here have witnessed. > > Thanks, > > Chris Padilla > Cisco Systems > San Jose, CA ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu