[SI-LIST] Re: 10 Layer Board Stack up
- From: Jeff Seeger <jseeger@xxxxxxxxxxxxxx>
- Date: Tue, 03 Dec 2002 03:59:23 -0500
> >Is there any Formula/Thumb rule behind this.
> >
> >most of my Critical Signal ( CLK) are Running at Signal Layer 1
> >and My Board Stack up is
> >
> >Top
> >GND
> >Signal Layer 1
> >VCC3.3
> >GND
> >VCC2.5
> >Signal Layer 2
> >Signal Layer 3
> >GND
> >Bottom
As has been pointed out, layer type should be symmetric
with respect to the Z axis to avoid boards that warp. The
dielectric thickness and type must also be treated with
symmetry.
One way to accomplish this is to use cross-hatched lines
on your 3.3v layer instead of a plane. This will give up
intrinsic capacitance but will allow the above stackup to
survive soldering cycles with a lower chance of bow/twist
problems. Such problems are high cost as they may render
a perfectly good and nearly finished board "worthless".
Ideally the cross-hatch (gridded) line pattern should re-
semble signal routing in density, but can be thicker. You
should set up the lines such that they do not overlay the
"Signal Layer 1" routing for any appreciable distance.
If such distribution can work for your 3.3v needs then it
may be a way to keep the stackup you already have.
--
Jeff Seeger Applied CAD Knowledge Inc
Chief Technical Officer Tyngsboro, MA 01879
jseeger "at" appliedcad "dot" com 978 649 9800
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