[PCB_FORUM] Re: Two Concept error questions
- From: "William Billereau" <William.Billereau@xxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Wed, 17 Oct 2007 13:41:47 +0200
For the first point, you have to call File/Change Suite in Concept and
select Allegro PCB design HDL.
It works for us.
For the second point, the error300, I added an alias in Allegro's alias
file named error300 that calls the command:
alias error300 "osdelete
..\packaged\pstcmdb.dat;(axlDBControl('cmgrEnabledFlow nil))"
maybe the pstcmdb.dat is not enough, sometimes it needs to remove all
*cmdb.dat files....
You have to load the BRD, run this alias, save the BRD and re-run the
export physical.
William.
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: 17 October, 2007 12:02 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Two Concept error questions
Thanks for the feedback.
We can not get any combination of tools to work.
1. Here are my choices when launching proj manager.
2. When loading Concept, I get:
3. Here are my choices
When choosing Legacy, then no warning #2, but when packaging I receive
the following error.
Any ideas what the board could have been saved in (Allegro)?
and which tool should be able to create the .dat files needed?
pstcmdb.dat and pstcmbc.dat
Thanks again for any feedback.
Mark
Van Os, Richard (GE Healthcare) wrote:
The first case is a warning. Follow the message to turn this check of
in the schematic.
The error listed below it means the previous schematic was package with
an expert tool versus a lower tier tool.
So going futher into the error message Design Constraint Manager
Enabled. Basically the repackage in the expert tool this will generate
the missing files pstcmdb.dat and pstcmbc.dat
Search on Design Constraint Manager Enabled in the help file for a full
explaination.
~Richard
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [
mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: Tuesday, October 16, 2007 11:55 AM
To: Cadence User Group
Subject: [PCB_FORUM] Two Concept error questions
We are experiencing the following two errors in Concept V.15.7
Any thoughts? We can not save the schematic or package to Allegro.
1. While saving the schematic, errors appear.
INFO (voltage_on_hdl) HDL Power Symbol doesn't have voltage property. To
turn off this warning please goto Tools->Options->Check and uncheck
'Voltage on HDL Symbols' option.
2. Packager error...there is nothing in Constraint manager.
Thanks in advance,
Mark
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