[PCB_FORUM] Re: Two Concept error questions
- From: "William Billereau" <William.Billereau@xxxxxxx>
- To: <icu-pcb-forum@xxxxxxxxxxxxx>
- Date: Thu, 18 Oct 2007 13:33:04 +0200
Mark,
You're welcome.
But I just wrote an alias that replays Cadence solution ;-)...
As far as I know (and seems to be confirmed on the solution below), the
only way to disable CM is by removing files and folder about it.
William.
The solution number on Sourcelink is 11051882:
Error message: When doing Export Physical, after deleting the
constraints folder, the following
error is reported: ERROR(300) Net Rev fatal error detected.
Design flow is Constraint Manager enabled, pstcmdb.dat and pstxnet.dat
do not appear to be
from the same packaging step.
Problem statement: The Constraint Manager has been used in ConceptHDL to
setup several ECSets and
rules. The customer is now finding that it will be easier to do all the
rule setup
from Allegro and would like to disable the CM enabled flow that is now
active. The
constraints folder was deleted and now when trying to do Export
Physical, the design
will not go through the process. What other steps are necessary to get
back to a
clean flow?
Solution: There are several steps we must go through to back out of the
CM enable flow. The
first thing we must do is determine if you have the level of 14.2 that
has this
capability built in to it. If you are in Allegro and do Help>About
Allegro you
will get a window that says something like 14.2-s041. This is the first
patched
version of Allegro that allows us to back out of enable flow.
Once that is done, the other steps are:
1. In Allegro
type: skill <return>
type: axlDBControl('cmgrEnabledFlow nil) <return>.
You should see a 't' in the command area which indicates the command was
successful.
This will reset the branding flag inside the database so netrev will not
look for
pstcm*.dat files.
type: exit <return> to exit the skill interpreter
Save the .brd file.
2. Delete the 'constraints' folder under <project>/worklib/<design name>
3. Delete the 'opf' folder under <project>/worklib/<design name>
4. In the 'packaged' directory - delete cmdbview.dat, cmdcview.dat,
pstcmdb.dat,
pstcmbc.dat, pstcmback.dat
5. Run Export Physical to regenerate the netlist files.
6. Run Import Logic in Allegro.
7. From this point on, constraints are managed in Allegro. Whenever you
run Export
Logic from Allegro,
the checkbox 'Export using Constraint Manager enabled flow' should be
unchecked.
Important: This procedure assume the design is flat and has been
back-annotated
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx
[mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: 17 October, 2007 4:07 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Two Concept error questions
William,
Excellent feedback! It did work, but here is what I had to do.
Since we do not even have any of the required *cmdb.dat files files I
ran
(axlDBControl('cmgrEnabledFlow nil)) in the Allegro command line, saved
the board and re-packaged.
And it WORKED!
Question...is this the only way to disable the Constraint Manager Flow?
I could not find anything in the setup or packager options. Is there a
secret place that this is documented?
Seems like there should be a selection box for this.
Again...THANKS! That one had us going!
Mark
William Billereau wrote:
For the first point, you have to call File/Change Suite in Concept and
select Allegro PCB design HDL.
It works for us.
For the second point, the error300, I added an alias in Allegro's alias
file named error300 that calls the command:
alias error300 "osdelete
..\packaged\pstcmdb.dat;(axlDBControl('cmgrEnabledFlow nil))"
maybe the pstcmdb.dat is not enough, sometimes it needs to remove all
*cmdb.dat files....
You have to load the BRD, run this alias, save the BRD and re-run the
export physical.
William.
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [
mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: 17 October, 2007 12:02 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Two Concept error questions
Thanks for the feedback.
We can not get any combination of tools to work.
1. Here are my choices when launching proj manager.
2. When loading Concept, I get:
3. Here are my choices
When choosing Legacy, then no warning #2, but when packaging I receive
the following error.
Any ideas what the board could have been saved in (Allegro)?
and which tool should be able to create the .dat files needed?
pstcmdb.dat and pstcmbc.dat
Thanks again for any feedback.
Mark
Van Os, Richard (GE Healthcare) wrote:
The first case is a warning. Follow the message to turn this check of
in the schematic.
The error listed below it means the previous schematic was package with
an expert tool versus a lower tier tool.
So going futher into the error message Design Constraint Manager
Enabled. Basically the repackage in the expert tool this will generate
the missing files pstcmdb.dat and pstcmbc.dat
Search on Design Constraint Manager Enabled in the help file for a full
explaination.
~Richard
________________________________
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx [
mailto:icu-pcb-forum-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Salberg
Sent: Tuesday, October 16, 2007 11:55 AM
To: Cadence User Group
Subject: [PCB_FORUM] Two Concept error questions
We are experiencing the following two errors in Concept V.15.7
Any thoughts? We can not save the schematic or package to Allegro.
1. While saving the schematic, errors appear.
INFO (voltage_on_hdl) HDL Power Symbol doesn't have voltage property. To
turn off this warning please goto Tools->Options->Check and uncheck
'Voltage on HDL Symbols' option.
2. Packager error...there is nothing in Constraint manager.
Thanks in advance,
Mark
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