Hi Vince,
You can add a "no_shape_connect" property to the vias. Then you have to
figure out a way to connect them to the shape (or pins) on top with only a fat
trace. I think that you could figure out a way to connect it without DRC's.
Ken Kiplinger
Design Solutions, Inc.
-----Original Message-----
From: icu-pcb-forum-bounce@xxxxxxxxxxxxx on behalf of Vince Di Lello
Sent: Sat 3/11/2006 2:27 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Cc:
Subject: [PCB_FORUM] Dual Plane VIA Connection Question
Hereâs hoping one of you great designers out there (and Allegro
expert) can help me out â in the picture below you will see a light blue
external (Top Side) 3.3V plane. Inside this board (but not shown) is a separate
3.3V plane. What I would like to do is have the (3) vias at the top of the
picture (coming off the electrolytic cap) make connection with the internal
3.3V plane and then connect to the electrolytic cap with traces as shown in the
picture. The 3.3V then travels down this small external plane coming into
contact with some other capacitors and ultimately ends at the two vias at the
bottom which carry the current from the top side of the board to the bottom
side of the board where in turn there are two traces that connect to two bottom
side pads of a bottom side connector. Now for my problem â the two vias at
the bottom of the light blue area are now also connected to the INTERNAL 3.3V
master plane (for clarity sake I did not turn that plane on). I DO NOT WANT
them to connect to the internal 3.3V plane. I want to force the 3.3V signal to
have to travel through the caps and then into the connector pads on the
external layer only. Is there a setting or a property that I can add to those
two vias so that they get connected to the small external 3.3V copper plane,
but NOT to the INTERNAL 3.3V master plane?
Any help, especially on a weekend, would be greatly appreciated. Thanks
in advance and I hope all who are listening will have a great weekend â at
least what is remaining of it. Thanks again.
Vincent Di Lello, CID+