[PCB_FORUM] Re: Documentation of material for manufacturing
- From: "westfeldt" <westfeldt_nbcd@xxxxxxxxx>
- To: icu-pcb-forum@xxxxxxxxxxxxx
- Date: Wed, 15 Sep 2004 18:35:20 -0600
Good idea about starting wider.
We do what everybody said about getting shop to suggest a stackup. This
also gives us a hope of the thicknesses being in stock.
Most of the time we give them a max variation on trace/space, without
specifying final dielectric thickness. However, there have been times (for
instance, when we are putting quotes out to more than one shop), where we
also specify max variation on a nominal dielectric thickness between the
important layers.
We also do the same trick of a weird trace width, so they can find it.
_____
From: Gene Carman [mailto:gcarman@xxxxxxxxxxxxxxx]
Sent: Wednesday, September 15, 2004 6:11 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Documentation of material for manufacturing
We do this too... working with the board shop is key.
One thing I did not see mentioned that we tend to do is once line widths are
established with the stackup and dielectrics in mind, we expand the
controlled impedance lines about 10%. This means that the lines are too
wide to begin with in the gerbers we deliver, thus if the shop needs to make
adjustments, they can shrink the lines with little risk of causing shorts.
We also use odd number lines... for instance if a controlled line is 10mils
I might use 10.1mils instead... this makes it easy for tools like Valor to
find these unique lines.
Microstrip and Stripline work well with this method, CPW is a bit harder to
manage this way, but with CPW we are usually using something other than
FR-4.
-----Original Message-----
From: Tony Stanislao [mailto:stanislao_t@xxxxxxxxxxxx]
Sent: Wednesday, September 15, 2004 1:25 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Re: Documentation of material for manufacturing
Generally, we submit a proposed stackup to the pcb fabricator along with the
impedance requirements and board thickness while in the beginning stages of
the layout.. He sends back a stackup dwg showing all etch widths and
impedance values. This chart usually has the dielectric constants shown for
each layer as well as the thickness of the inner cores. We have never been
asked to supply any dielectric constants. Its their job to figure out the
prepreg thickness and inner cores.
Tony Stanislao, Senior PCB Design Engineer
Pannaway Technologies | v: 603.766.5129| e: stanislao_t@xxxxxxxxxxxx
<mailto:%20stanislao_t@xxxxxxxxxxxx>
=========================================
-----Original Message-----
From: Milostnik Matija IESMSD [mailto:milostnik@xxxxxxxxxxx]
Sent: Wednesday, September 15, 2004 3:45 PM
To: icu-pcb-forum@xxxxxxxxxxxxx
Subject: [PCB_FORUM] Documentation of material for manufacturing
Hello Folks,
Doing high speed design is a challenging task anyway, but even more is to
write the right documentation for the board producer. :-)
Up until recently we just gave the general board stackup and the dielectric
constant.
Now for better documentation we give an exact stackup and the dielectric
constant.
Our producer is asking us to specify in which tolerance we can give the
dielectric constant, similar to the board thickness, were we usually have
+/-10%
Looking at the material qualities a +/-10% on dielectric constant would
allow a board producer to take a material ranging form E0=4.32 to E0=5.28
instead of the E0=4.8 that we calculated with.
Even worse on the manufacturing tolerance. The prepreg usually involved in
the stackup can also change for +/-10% in thickness, either because the
final thickness is allowed to change this much, or because during pressing
the prepreg gets squeezed differently on different parts of the board,
depending on the density of the traces in the area.
Etching can also change impedance, but this is left to the board producer to
cope with, since mathematically speaking the most important influence are
(in order of importance):
1) Material properties and trace distance from planes (involves dielectric,
tangent loss, core and prepreg geometry)
2) Trace with (etching)
3) Trace height (choosing copper 1/2 once or 1/4 of once, finish)
My questions are:
-How do you specify the material properties.
-How much tolerance do you allow for dielectric constant.
-Do you specify a tangent loss to in the material specification (e.g. less
than 0.020)
-Do you have any other method of specifying high speed designs, that have
worked for you.
-Does Cadence or ODB++ or other data interchange format help in any way
achieving better data transfer for the purpose of high speed designs?
Thanks for any help
Matija
Seid gegen den Krieg, nicht weil ihr Gewalt hasst, sondern
weil ihr den Frieden um so mehr liebt. J.M.Haig.
Matija Milostnik, Email: milostnik@xxxxxxxxxxx
IskraTEL Electronics, Ljubljanska 24a, SI-4000 Kranj, Slovenia
Tel: +386 4 207 2125, Fax: +386 4 20 21 552
www.IskraTEL-Electronics.si: The power of partnership
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