We work closely with a fab house before the card wiring starts to get a
stack up they can build and one that we are happy with.
We specify the material - not the characteristics of that material
We put the infomation in the final agreed upon stack up on our fab drawing
this includes material, base Dk, stackup order and prepreg thickness,
overall card thickness and tolerance, copper wgts per layer,
plating thickness minimums, and plating materials and thickness of those.
Almost every fab house will tell you that 10% is the best they can
guarentee, but reality is that if you work with the same people
for every card you will find that they hold tolerances much tighter than
that.
We don't specify only the base Dk, not a tolerance as that is material
based.
We don't specify loss tangent as that is material and frequency based.
Sue Reade
CAD Engineer
Tekelec
5200 Paramount Pkwy
Morrisville, NC 27560
sue.reade@xxxxxxxxxxx
Office: 919-461-1047
Cell: 919-819-8092
|---------+--------------------------->
| | "Milostnik |
| | Matija IESMSD" |
| | Sent by: |
| | |
| | |
| | 09/15/2004 03:44|
| | PM |
| | Please respond |
| | to icu-pcb-forum|
| | |
|---------+--------------------------->
>---------------------------------------------------------------------------------------------------------------|
|
|
| To: <icu-pcb-forum@xxxxxxxxxxxxx>
|
| cc:
|
| Subject: [PCB_FORUM] Documentation of material for manufacturing
|
>---------------------------------------------------------------------------------------------------------------|
Hello Folks,
Doing high speed design is a challenging task anyway, but even more is to
write the right documentation for the board producer. :-)
Up until recently we just gave the general board stackup and the dielectric
constant.
Now for better documentation we give an exact stackup and the dielectric
constant.
Our producer is asking us to specify in which tolerance we can give the
dielectric constant, similar to the board thickness, were we usually have
+/-10%
Looking at the material qualities a +/-10% on dielectric constant would
allow a board producer to take a material ranging form E0=4.32 to E0=5.28
instead of the E0=4.8 that we calculated with.
Even worse on the manufacturing tolerance. The prepreg usually involved in
the stackup can also change for +/-10% in thickness, either because the
final thickness is allowed to change this much, or because during pressing
the prepreg gets squeezed differently on different parts of the board,
depending on the density of the traces in the area.
Etching can also change impedance, but this is left to the board producer
to cope with, since mathematically speaking the most important influence
are (in order of importance):
1) Material properties and trace distance from planes (involves dielectric,
tangent loss, core and prepreg geometry)
2) Trace with (etching)
3) Trace height (choosing copper 1/2 once or 1/4 of once, finish)
My questions are:
-How do you specify the material properties.
-How much tolerance do you allow for dielectric constant.
-Do you specify a tangent loss to in the material specification (e.g. less
than 0.020)
-Do you have any other method of specifying high speed designs, that have
worked for you.
-Does Cadence or ODB++ or other data interchange format help in any way
achieving better data transfer for the purpose of high speed designs?
Thanks for any help
Matija
Seid gegen den Krieg, nicht weil ihr Gewalt hasst, sondern
weil ihr den Frieden um so mehr liebt. J.M.Haig.
Matija Milostnik, Email: milostnik@xxxxxxxxxxx
IskraTEL Electronics, Ljubljanska 24a, SI-4000 Kranj, Slovenia
Tel: +386 4 207 2125, Fax: +386 4 20 21 552
www.IskraTEL-Electronics.si: The power of partnership
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