Bob, Thanks for the link. The only thing that I see on slides 3-7 in your presentation that we can't do today with the [External ***] and [Node Declarations] keywords is the cascading a buffer model in [External Model] with an [External Circuit] serving as an on-die interconnect. If the buffer model would be provided in an [External Circuit] (which are cascadable in the current spec), everything on your slides could be done today. The thinking in those days was that [External Model] was kind of an interim solution for improved buffer modeling while keeping the "foot print" of [Model], but the expectation was that eventually all buffer models would end up in [External Circuit], allowing for as many (supply and signal) terminals as needed for accuracy. This "migration" of buffer modeling to [External Circuit] didn't happen and consequently we are starting to see the need for cascading [Model] (optionally [External Model]) with [External Circuit] which would contain the on-die interconnect model (optionally with IBIS-ISS). As soon as we eliminate the limitation in the current specification that [Model]s can't be cascaded with [External Circuit] (BIRD 145), we could do everything that is shown on your slides. Another way to achieve the same result would be to find a way to put [Model] inside [External Circuit] but that could become a little more challenging. So I am not sure I understand what you are referring to by saying "We did not adopt many of the features", because to me it seems that we are only missing one feature. Could you elaborate on that? Thanks, Arpad ==================================================================== -----Original Message----- From: ibis-interconn-bounce@xxxxxxxxxxxxx [mailto:ibis-interconn-bounce@xxxxxxxxxxxxx] On Behalf Of Bob Ross Sent: Wednesday, February 06, 2013 11:31 AM To: IBIS-Interconnect; 'IBIS-ATM' Subject: [ibis-interconn] IBIS - Multi-lingual Earlier Presentation All: Per IBIIS Interconnect meeting comment regarding extending IBIS for both more general analog buffer modeling and also on-die interconnect, here is a presentation that relates to an original multi-lingual proposal. http://www.eda.org/ibis/summits/jan02/ross2.pdf (particularly slides 3-7) We did not adopt many of the features, and we went a different direction in the released specification (for example, direct connection of the model to the die pad). BIRDs 116-118, 145 and others attempts to backfill and add some, but not all of the features. However, the reason for showing this is to explore the requirements for a more general buffer model and on-die interconnect within traditional IBIS. Bob -- Bob Ross Teraspeed Consulting Group, LCC http://www.teraspeed.com bob@xxxxxxxxxxxxxx Direct : 503-246-8048 Teraspeed Labs: 503-430-1065 Headquarters: 401-284-1827 Teraspeed is a registered service mark of Teraspeed Consulting Group LLC ------------------------------------------------------------------ The IBIS Ad Hoc Interconnect Task Group Mailing List Archives are available at: //www.freelists.org/archives/ibis-interconn TO UNSUBSCRIBE: Send a message to "ibis-interconn-request@xxxxxxxxxxxxx" with a subject of "unsubscribe" To administer your subscription status from the web, visit: //www.freelists.org/list/ibis-interconn Meeting minutes and files are available; visit: http://www.eda.org/ibis/interconnect_wip/ --------------------------------------------------------------------- IBIS Macro website : http://www.eda.org/pub/ibis/macromodel_wip/ IBIS Macro reflector: //www.freelists.org/list/ibis-macro To unsubscribe send an email: To: ibis-macro-request@xxxxxxxxxxxxx Subject: unsubscribe