[SI-LIST] voltage regulator

  • From: timoceous <timoceous@xxxxxxxxx>
  • To: si <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 12 Jan 2005 21:32:52 -0800 (PST)

Hi Gurus,

     I have a question on the voltage regultion(on
chip). I know that many people have writing papers
about VDD regulator.  But has anyone done a regulator
which is referenced to ground?  For instance, most of
the regulator either use PMOS with source tied to VDD
and source current to the Rload nad Cload to ground. 
Can the same applied to using NMOS with source tied to
ground and sinking current from Rload and Cload tied
to Vdd?
Why no one has writing paper to discuess about it?

Regards,

Tim


                
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