[SI-LIST] temporary positions available at Mayo Clinic
- From: "Buchs, Kevin" <buchs.kevin@xxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 12 Feb 2009 17:29:46 -0600
We are currently seeking individuals for temporary positions (minimum
6-month duration) to work on-site at Mayo Clinic in Rochester,
Minnesota. Note that you will be coming to Rochester during our
tropical weather season! Most notable among these positions is a SI
Engineer (job # 23604) and Packaging Engineer (job #23599). There are
also positions for a Systems Engineer (#23609) and Digital Designer
(#23607). I've included the full description for the SI and Packaging
Engineer positions below. You can also go to our website to view and
apply for these jobs. Since you must apply at the website, it is
preferred that you submit your resume through that path anyway because
it will be required. Note that Mayo calls three of these: SI, Systems
and Digital Designer, "Limited Tenure" positions, a academic term, but
effectively that means it is temporary with benefits.
How to view and apply for these positions:
<http://www.mayoclinic.org/jobs-rst/find-job.html> Visit
http://www.mayoclinic.org/jobs-rst/find-job.html . Press "Find a Job"
in the center of the page.
You can register (which would allow a resume and cover letter to be
uploaded) or press "Not Registered Yet" if you just want to look. Enter
the job number in the keyword field and press enter
Kevin Buchs Mayo Clinic 200 1st St. SW Rochester, MN 55901
buchs.kevin@xxxxxxxx 507-538-5459 http://www.mayo.edu/sppdg
SI Engineer Position (Senior Engineer) #23604
This limited tenure position will have a duration anywhere from 6-18
months. The Mayo Clinic Special Purpose Processor Development Group
(SPPDG) is in need of a Senior Engineer to perform a variety of signal
integrity analyses. Examples include the following: analyses of IC
packages, printed circuit boards, connectors, sockets and cables;
aggregate analyses of memory links or high speed serial links (at data
rates > 5 Gbps); and assessment of hardware designs and generation of
design rules for packages and printed circuit boards. Documentation of
findings in report and presentation formats is required. The SPPDG is an
electronics technology research group dedicated to developing next
generation electronics technology for high speed signal processor
applications. Our primary mission is the development of advanced
technology for high clock rate digital signal processors and wide
bandwidth, high center frequency analog systems. The SPPDG is equipped
with a full suite of CAD and simulation tools, a high performance test
facility and a class 100 microelectronic assembly clean room. Candidate
must be proficient in the use of software applications such as MS Office
for documentation, CAD tools for schematic capture and layout review, EM
modeling tools for 2.5D or 3D modeling and simulation, and circuit
analysis tools for analysis of planar structures and high speed links.
Familiarity with the use of Ansoft analysis tools or CST Microwave
Studio and a base working knowledge of HSPICE is required; experience
with MatLab is considered a plus. Candidates should have at least one of
the following skills: the ability to locate and identify appropriate
performance and model information for high speed digital electrical
interconnect technology and to use the models in simulation; the ability
to create design rules for printed circuit boards to conform to
generally accepted signal integrity practices and to examine designs to
determine weaknesses in regard to such practices; a knowledge of how to
design and measure test fixtures for the purpose of capturing model
information. Experience in the area of power delivery network design and
analysis is a plus. U.S. Citizenship required.
Packaging Engineer Position (Project Engineer Level) #23599
This temporary position has an end date of August 4, 2009. The Mayo
Clinic Special Purpose Processor Development Group (SPPDG) is in need of
a Packaging Engineer to design IC packages and printed circuit boards
(PCBs). The candidate is expected to be an experienced Cadence-flow
(Allegro) PCB/package designer capable of the following: developing
designs with minimal guidance using rough specifications, component
datasheets and input from SPPDG signal integrity engineering staff; and
guiding PCB/package layout resources to complete designs including
definition of constraints, project setup, and management of complete
design as well as the outsourced fabrication process. This position
requires an understanding of advanced PCB design
techniques/capabilities/materials and knowledge of potential
implementation issues with the CAD tools. Documentation of designs in
reports and presentations is required. The SPPDG is an electronics
technology research group dedicated to developing next generation
electronics technology for high speed signal processor applications. Our
primary mission is the development of advanced technology for high clock
rate digital signal processors and wide bandwidth, high center frequency
analog systems. The SPPDG is equipped with a full suite of CAD and
simulation tools, a high performance test facility and a class 100
microelectronic assembly clean room. Basic Qualifications: U.S.
Citzenship Required.
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