[SI-LIST] set si-list digest2

  • From: Adam Klein <Aklein@xxxxxxxxxxxxxxxxxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Tue, 19 Jun 2001 15:38:17 -0700

At 09:00 PM 6/18/01 -0500, you wrote:
>si-list Digest  Mon, 18 Jun 2001        Volume: 01  Issue: 027
>
>In This Issue:
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: 1GHz clock needed, please share your info with
>                 [SI-LIST] measuring Hi-Z and Lo-Z state
>                 [SI-LIST] Improve the heat on a PCB
>                 [SI-LIST] Re: Improve the heat on a PCB
>                 [SI-LIST] Hspice core dump
>                 [SI-LIST] Re: Hspice core dump
>                 [SI-LIST] Re: Hspice core dump
>                 [SI-LIST] Re: Voltage rating of a Ceramic capacitor
>                 [SI-LIST] FYI: Solder ...
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: Inductance of Via
>                 [SI-LIST] Re: SI Position Open READ THIS!!!!
>                 [SI-LIST] Re: Improve the heat on a PCB
>
>----------------------------------------------------------------------
>
>From: "Greim, Michael" <mgreim@xxxxxxxxxxxx>
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>Date: Mon, 18 Jun 2001 08:20:43 -0400
>
>
>Hi Bo,
>
>I am not sure if you were aware that high speed ecl based
>systems were being designed well before 94-95 and that even
>the tools such as TLC to solve these problems were available
>before that time as well.  I remember solving noise and power
>problems early to mid 80s.  You young folks might not remember
>when big systems were prototyped with 3 deep 9u wire wrap
>boards. There was plenty of noise to be had on those.
>
>hey, anybody remember making twisted pair wire wrap wire by
>putting two pieces of wire wrap wire in a drill.  Those were
>the days my friend.
>
>Ya know, I have been working on SI and I can tell you that there
>aren't many people who know how long SI has been around.  There
>are also a number of folks who believe that frequency is what drives
>the need.
>
>SI not an issue at lower speeds.  Yikes!  This is probably one of the
>more entertaining SI issues to solve today as newer technologies
>with more agressive edge rates are dropped into legacy boards
>designed when SI was not taken into consideration.  While there is certainly
>a correlation between edge rate and frequency, edge rate is where
>the focus needs to be regardless of frequency.
>
>What I'm trying to say is that your post will make some people
>laugh.  (perhaps not quite so much as posting 15 megs of files
>to over 2K people).
>
>
>The above post has been entertainingly posted with the following
>blanket obligatory  ;-)  8-).  Many of the above lines were stolen
>without permission from the original author of the attached post.
>
>Best Regards,
>
>Michael C. Greim                 Sonus Networks
>mgreim@xxxxxxxxxxxx        978-589-8336
>
>Making the world safe for digital signals everywhere
>
>And all this science I don't understand
>It's just my job six days a week
>
>The time is gone. The email's over
>Thought I'd something more to say......
>
>
>-----Original Message-----
>From: Bo [mailto:bo_pfc@xxxxxxxxx]
>Sent: Friday, June 15, 2001 9:45 PM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>
>
>
>Hi Esther,
>
>I am not sure if you are aware but Signal Integrity did show up until 94-95.
>
>The only person to satisfy your requirements is Howard Johnson aka author of
>first book on SI "Book of Black Magic".  What I am trying to say is that
>your
>post will make some people laugh.  Don't worry you are not the first one
>with
>similar post.  What you should have wrought is "8 years of high speed PCB
>board
>design with emphasis on signal integrity".  That would be more belivable.
>The SI wasn't issue at lower speeds.  It has shown up in last few years as a
>mayor issue.  I have been working on SI and I can tell you there aren't that
>many people who really know SI.  You should look for a person who has
>designed
>whole lot of backplanes and who has done SI simulations on their own (not
>someone who got other people to do it for them).
>
>I hope this helps you.  And I hope you find right person for the job.
>
>
>Regards,
>Bo
>
>p.s. If you need help being more specific in your search feel free to
>contact
>me.
>p.p.s.  I am not looking for a job and I probably wouldn't fit your
>qualifications.  I am just trying to help.
>
>--- esther williams <estherw2000@xxxxxxxxx> wrote:
> >
> > Hello - The following is a SI position at an Optical Data Networking start
> > up.
> >
> > Please contact: Esther at ewilliams@xxxxxxxxxxxx for more information.
> >
> > Title: Senior Signal Integrity Engineer
> >
> > Location: Mountain View, CA
> >
> > Job Description:
> >
> > - Specify, simulate, design and analyze high speed interfaces for data
> > networking systems.
> >
> > - Verification of actual hardware and confirm the simulations results to
> > guarantee integrity of all the high speed interfaces.
> >
> > - Generate guide lines for board designers and layout designers for the
>high
> > speed routing.
> >
> > - Setup process to sign off layouts for PCB fabs.
> >
> > Position Requirements:
> >
> > - Experience with high speed IOs like LVDS, HSTL, SSTL, LVTTL, CML, PECL.
> >
> > - Familiar with high speed bus interfaces.
> >
> > - Knowledgeable with ASIC design flow and IO selection process.
> >
> > - Extensive use of SPICE and IBIS to simulate signal integrity for the
>high
> > speed board.
> >
> > - Experience with QUAD like tools to sign off PCB layout designs.
> >
> > - Multi-gigabit board design and EMI/EMC containment techniques.
> >
> > - Defined impedance controlled PCB stack-ups and familiar with fabrication
> > process and backplane designs.
> >
> > - MSEE or PhD.
> >
> > - 8 + year's experience in signal integrity.
> >
> >
> >
> > ---------------------------------
> > Do You Yahoo!?
> > Yahoo! Buzz Index - Spot the hottest trends in music, movies,and more.
> >
> > ------------------------------------------------------------------
> > To unsubscribe from si-list:
> > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> > For help:
> > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >
> > List archives are viewable at:
>//www.freelists.org/archives/si-list
> > Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >
> >
>
>
>__________________________________________________
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>
>Old list archives are viewable at: http://www.qsl.net/wb6tpu
>
>
>------------------------------
>
>From: Michael Nudelman <mnudelman@xxxxxxxxxxx>
>Subject: [SI-LIST] Re: 1GHz clock needed, please share your info with
>Date: Mon, 18 Jun 2001 09:19:30 -0400
>
>
>Try Saronix
>
>-----Original Message-----
>From: Yu Wang [mailto:wangy_km@xxxxxxxxx]
>Sent: Saturday, June 16, 2001 6:17 PM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: 1GHz clock needed, please share your info with
>me.
>
>
>
>Hi, guys,
>I posted this query for several days, but
>unfortunately no answer. Could you all do me a faver
>to provide your comments? Thanks.
>
>regards,
>Yu
>--- Yu Wang <wangy_km@xxxxxxxxx> wrote:
> > Hi, gurus out of there,
> > I need a 1GHz clock generator and prefer that it's
> > best to be a single chip and cheap. The jitter
> > feature
> > is not very critical, 200ps is good enough.
> > Please give me an idea. Thank you.
> > all comments are highly appreciated.
> >
> > Yu Wang
> >
> > =====
> >
> >
> > __________________________________________________
> > Do You Yahoo!?
> > Get personalized email addresses from Yahoo! Mail -
> > only $35
> > a year!  http://personal.mail.yahoo.com/
> >
>------------------------------------------------------------------
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> > the Subject field
> > For help:
> > si-list-request@xxxxxxxxxxxxx with 'help' in the
> > Subject field
> >
> > List archives are viewable at:
> > //www.freelists.org/archives/si-list
> > Old list archives are viewable at:
> > http://www.qsl.net/wb6tpu
> >
> >
>
>
>=====
>
>
>__________________________________________________
>Do You Yahoo!?
>Spot the hottest trends in music, movies, and more.
>http://buzz.yahoo.com/
>------------------------------------------------------------------
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>
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>
>
>------------------------------
>
>From: rajat.chauhan@xxxxxx
>Date: Mon, 18 Jun 2001 19:52:23 +0530
>Subject: [SI-LIST] measuring Hi-Z and Lo-Z state
>
>
>Hello Ivor,
>   I don't know if there is any such Std. method for measuring Hi-Z or
>Lo-Z state .Generaly vendors specify the way they have used to measure
>them, along with their specs. For one such method you can refer chapter
>6, section 6.2(AC Outputs) of book Application-Specific Integrated
>Circuits by Michael John Sebastian Smith. You can find this book at
>www.dacafe.com .
>
>regards
>Rajat
> >
> > Hi,
> >
> > I am running hspice simulation on a bidirectional IO buffer provided by
> > my vendor.  I am wondering whether there is a standard circuit
> > configuration to measure the Hi-Z and the Lo-Z state of the buffer?  I
> > want to make sure that bus contention does not happen for this
> > interface.
> >
> > Ivor.
> > --
> > **************************************************************
> > Ivor Ting                         Email: ivor.ting@xxxxxxxxxxx
> > ASIC Development, Alcatel CID     Phone: (604)-453-3208
> > Suite 400-4190 Still Creek Drive  Fax  : (604)-421-2644
> > Burnaby, B.C., Canada, V5C 6C6    Web  : www.cid.alcatel.com
> > **************************************************************
> >
> >
> > ------------------------------------------------------------------
>
>
>
>
>
>
>
>
>------------------------------
>
>From: "BIBICHA" <f_bouchra@xxxxxxxxx>
>Subject: [SI-LIST] Improve the heat on a PCB
>Date: Mon, 18 Jun 2001 13:08:42 -0400
>
>
>Hi All:
>
>I am just wondering if anybody know how to improve heat dissipation on a
>PCB.  That would include additional layers, more copper...
>
>Any help is greatly appreciated
>
>Thanks
>Bouchra
>
>
>_________________________________________________________
>Do You Yahoo!?
>Get your free @yahoo.com address at http://mail.yahoo.com
>
>
>------------------------------
>
>From: "Zabinski, Patrick J." <zabinski.patrick@xxxxxxxx>
>Subject: [SI-LIST] Re: Improve the heat on a PCB
>Date: Mon, 18 Jun 2001 12:03:53 -0500
>
>
>A couple of ideas to consider:
>
>* Flood the outer surfaces with (grounded) copper, and
>expose as much of it as possible.  Use soldermask
>sparingly, thus exposing the copper, which will in turn
>radiate more heat.
>
>* Use MANY vias to bring the heat from the hotter parts
>down to the inner planes.  Then, use thick planes to
>spread the heat across the board.
>
>* If possible, thermally-connect the planes to external
>devices.  For example, if you can, bring the ground planes
>to the outer board edges, expose the planes, and have
>the planes make contact to metal card rails, thus transfering
>the heat to the enclosure.
>
>In brief, try to find as many and as big of metallic path
>from the main heat sources to the outside as possible.
>
>Pat
>
> >
> >
> > Hi All:
> >
> > I am just wondering if anybody know how to improve heat
> > dissipation on a
> > PCB.  That would include additional layers, more copper...
> >
> > Any help is greatly appreciated
> >
> > Thanks
> > Bouchra
> >
> >
>
>------------------------------
>
>Date: Mon, 18 Jun 2001 13:59:41 -0400
>From: Michael Baxter <baxter@xxxxxxxx>
>Subject: [SI-LIST] Hspice core dump
>
>
>Hello to everyone,
>
>I've been having a problem recently with Hspice causing
>a core dump when I run a set of encrypted models (the
>encryption may or may not be a factor). In the recent
>past I had a similar problem with another vendor's models
>but found something simple (like a node name it did not
>like) that was causing the dump.
>
>Has anyone seen a similar problem? Any suggestions on
>where to look?
>
>Thanks,
>
>- Michael
>
>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
>| Michael Baxter           e-mail: baxter@xxxxxxxx |
>| Principal SI Engineer                            |
>| NESA, Inc.               http://www.nesa.com/    |
>| 5 LAN Drive ~ Suite 200  Tel +1.978.392-8787     |
>| Westford, MA 01886 USA   Fax +1.978.392-8686     |
>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
>
>
>------------------------------
>
>Date: Mon, 18 Jun 2001 11:06:23 -0700
>From: Scott McMorrow <scott@xxxxxxxxxxxxxxxx>
>Subject: [SI-LIST] Re: Hspice core dump
>
>
>Michael,
>
>Are you running 2000.4 or 2000.2?
>We're finding lots of little issues with 2000.4 here.
>
>scott
>
>
>--
>Scott McMorrow
>Principal Engineer
>SiQual, Signal Quality Engineering
>18735 SW Boones Ferry Road
>Tualatin, OR  97062-3090
>(503) 885-1231
>http://www.siqual.com
>
>
>Michael Baxter wrote:
>
> > Hello to everyone,
> >
> > I've been having a problem recently with Hspice causing
> > a core dump when I run a set of encrypted models (the
> > encryption may or may not be a factor). In the recent
> > past I had a similar problem with another vendor's models
> > but found something simple (like a node name it did not
> > like) that was causing the dump.
> >
> > Has anyone seen a similar problem? Any suggestions on
> > where to look?
> >
> > Thanks,
> >
> > - Michael
> >
> > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
> > | Michael Baxter           e-mail: baxter@xxxxxxxx |
> > | Principal SI Engineer                            |
> > | NESA, Inc.               http://www.nesa.com/    |
> > | 5 LAN Drive ~ Suite 200  Tel +1.978.392-8787     |
> > | Westford, MA 01886 USA   Fax +1.978.392-8686     |
> > +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
> >
> > ------------------------------------------------------------------
> > To unsubscribe from si-list:
> > si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> > For help:
> > si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >
> > List archives are viewable 
> at:     //www.freelists.org/archives/si-list
> > Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >
>
>
>
>
>------------------------------
>
>From: "chen, jinhua" <chen_jinhua@xxxxxxx>
>Subject: [SI-LIST] Re: Hspice core dump
>Date: Mon, 18 Jun 2001 14:08:17 -0400
>
>
>Hi, Michael
>
>Most of the core dumps I had were caused by the ^M in the
>end of each line. Did you check the format the encrypted
>models? If it is in DOS format, you have to change it to
>UNIX format.
>
>Good luck!
>
>Jinhua
>
>-----Original Message-----
>From: Michael Baxter [mailto:baxter@xxxxxxxx]
>Sent: Monday, June 18, 2001 2:00 PM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Hspice core dump
>
>
>
>Hello to everyone,
>
>I've been having a problem recently with Hspice causing
>a core dump when I run a set of encrypted models (the
>encryption may or may not be a factor). In the recent
>past I had a similar problem with another vendor's models
>but found something simple (like a node name it did not
>like) that was causing the dump.
>
>Has anyone seen a similar problem? Any suggestions on
>where to look?
>
>Thanks,
>
>- Michael
>
>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
>| Michael Baxter           e-mail: baxter@xxxxxxxx |
>| Principal SI Engineer                            |
>| NESA, Inc.               http://www.nesa.com/    |
>| 5 LAN Drive ~ Suite 200  Tel +1.978.392-8787     |
>| Westford, MA 01886 USA   Fax +1.978.392-8686     |
>+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~+
>
>------------------------------------------------------------------
>To unsubscribe from si-list:
>si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>For help:
>si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
>List archives are viewable at:     //www.freelists.org/archives/si-list
>
>Old list archives are viewable at: http://www.qsl.net/wb6tpu
>
>
>------------------------------
>
>From: Vikas.Mishra@xxxxxxxxxx
>Date: Mon, 18 Jun 2001 14:08:54 +0500
>Subject: [SI-LIST] Re: Voltage rating of a Ceramic capacitor
>
>
>
>
>Hi Ravinder,
>
>X5R is a good choice for decoupling purpose as it has high dielectric constant
>and temperature stability.
>Regarding voltage rating, the rule of thumb is >150% of Operating voltage. As
>far as your application is considered 10V will be an appropriate choice.
>
>Thanks
>Vikas
>
>-----Original Message-----
>From: Ravinder Ajmani [mailto:ajmani@xxxxxxxxxx]
>Sent: Thursday, June 14, 2001 6:12 PM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Voltage rating of a Ceramic capacitor
>
>
>I have been asked to replace Tantalum bulk capacitor in a design with a
>suitable Ceramic capacitor.  The Ceramic capacitor is X5R type, which I
>believe is more stable than Y5V.  However, its voltage rating being
>6.3V, I
>am not feeling very comfortable to use it in the 5V application.  Can
>anyone advise me about the minimum voltage rating I should have for a
>bulk
>Ceramic capacitor in a 5V application.
>
>Regards, Ravinder
>PCB Development and Design Department
>IBM Corporation
>Email: ajmani@xxxxxxxxxx
>
>
>
>------------------------------
>
>From: "Doug McKean" <dmckean@xxxxxxxxxxxxxxx>
>Subject: [SI-LIST] FYI: Solder ...
>Date: Mon, 18 Jun 2001 11:44:28 -0700
>
>
>Thought is was an interesting article to pass along ...
>
>   http://www.tms.org/pubs/journals/JOM/9605/McCormack-9605.html
>
>- Doug McKean
>
>
>
>
>------------------------------
>
>From: MikonCons@xxxxxxx
>Date: Mon, 18 Jun 2001 15:35:47 EDT
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>
>Bo:
>
>Please don't take personal offense at the following. Most of your comments
>are on target; however, there are several of us "older dawgs" who have been
>providing guidance and education/tutorials in SI long before 1990. For the
>microwave dudes, transmission line characteristics and their associated
>impedance transformations versus frequency were standard fare to even be in
>the design area. I used SI techniques in 1961 to design a folded resonant
>cavity S-band (2.4 GHz), low-noise (1.2 dB noise figure) receiver that was
>1/8-inch thick and one-inch square. I used two layers of teflon-fiberglass
>PCB material to build a narrowband signal frequency filter at 2.4 GHz, a
>2.397 GHz local oscillator (LO) tank, and a 30 MHz intermediate frequency
>(IF) tank. I used a single Tunnel diode that operated at 300 UA at 375 mVdc
>to achieve 14 dB signal plus down-conversion gain. The effort was for the
>USAF and not for comercialization.
>
>"SI" has only recently become familiar to the digital "ones and zeros" crowd
>that now realize that they must learn analog techniques to rise to the next
>level of electronic systems education. The market volume demand for
>communications networks is of course the primary driver today.
>
>My particular strength that got me into the currently popular digital SI
>field was EMI. As many now know, radiated emissions problems usually have
>their roots in poor SI designs on PCBs.
>
>Just my 2 cents.
>
>Mike
>
>Michael L. Conn
>Owner/Principal Consultant
>Mikon Consulting
>(408)727-5697
>
>             *** Serving Your Needs with technical Excellence ***
>
>
>
>------------------------------
>
>Date: Mon, 18 Jun 2001 13:51:05 -0700
>From: "Dr. John L. Prince" <prince@xxxxxxxxxxxxxxx>
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>
>
>The temptation is just too great!!  The endeavor we call SI now has been
>around possibly since the 50's, at major computer companies (or maybe just
>at one major computer company).  I first developed and taught a
>university-level class (at Clemson University) which included "SI" elements
>in 1977--it was in fact a class in high speed digital electronics, so it
>included the circuit characteristics as well it must in this area.  Bill
>Blood, thanks for help from your book!  In 1983 the situation was becoming
>more serious, and here at Arizona we started a class in packaging which
>included "SI" elements.  In 1984 we received major funding from SRC (which
>we still have, nearly 20 years later) to develop the science and algorithms
>behind what you now call "SI".  Around 200 papers dating back to 1986, and
>numerous graduate students(dating back to 1986), have come out of this
>effort.  Since 1990 or so  there are other university programs (but not
>very many) which also address this area.
>
>So, there is little new under the sun today, just new names for things.
>And, just more fun to be had in a neat field.  John Prince
>
>At 06:45 PM 06/15/2001 -0700, you wrote:
> >
> >Hi Esther,
> >
> >I am not sure if you are aware but Signal Integrity did show up until 
> 94-95.
> >The only person to satisfy your requirements is Howard Johnson aka author of
> >first book on SI "Book of Black Magic".  What I am trying to say is that 
> your
> >post will make some people laugh.  Don't worry you are not the first one 
> with
> >similar post.  What you should have wrought is "8 years of high speed PCB
>board
> >design with emphasis on signal integrity".  That would be more belivable.
> >The SI wasn't issue at lower speeds.  It has shown up in last few years as a
> >mayor issue.  I have been working on SI and I can tell you there aren't that
> >many people who really know SI.  You should look for a person who has
>designed
> >whole lot of backplanes and who has done SI simulations on their own (not
> >someone who got other people to do it for them).
> >
> >I hope this helps you.  And I hope you find right person for the job.
> >
> >
> >Regards,
> >Bo
> >
> >p.s. If you need help being more specific in your search feel free to 
> contact
> >me.
> >p.p.s.  I am not looking for a job and I probably wouldn't fit your
> >qualifications.  I am just trying to help.
> >
> >--- esther williams <estherw2000@xxxxxxxxx> wrote:
> >>
> >> Hello - The following is a SI position at an Optical Data Networking start
> >> up.
> >>
> >> Please contact: Esther at ewilliams@xxxxxxxxxxxx for more information.
> >>
> >> Title: Senior Signal Integrity Engineer
> >>
> >> Location: Mountain View, CA
> >>
> >> Job Description:
> >>
> >> - Specify, simulate, design and analyze high speed interfaces for data
> >> networking systems.
> >>
> >> - Verification of actual hardware and confirm the simulations results to
> >> guarantee integrity of all the high speed interfaces.
> >>
> >> - Generate guide lines for board designers and layout designers for the
>high
> >> speed routing.
> >>
> >> - Setup process to sign off layouts for PCB fabs.
> >>
> >> Position Requirements:
> >>
> >> - Experience with high speed IOs like LVDS, HSTL, SSTL, LVTTL, CML, PECL.
> >>
> >> - Familiar with high speed bus interfaces.
> >>
> >> - Knowledgeable with ASIC design flow and IO selection process.
> >>
> >> - Extensive use of SPICE and IBIS to simulate signal integrity for the 
> high
> >> speed board.
> >>
> >> - Experience with QUAD like tools to sign off PCB layout designs.
> >>
> >> - Multi-gigabit board design and EMI/EMC containment techniques.
> >>
> >> - Defined impedance controlled PCB stack-ups and familiar with fabrication
> >> process and backplane designs.
> >>
> >> - MSEE or PhD.
> >>
> >> - 8 + year's experience in signal integrity.
> >>
> >>
> >>
> >> ---------------------------------
> >> Do You Yahoo!?
> >> Yahoo! Buzz Index - Spot the hottest trends in music, movies,and more.
> >>
> >> ------------------------------------------------------------------
> >> To unsubscribe from si-list:
> >> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> >> For help:
> >> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >>
> >> List archives are viewable at:
>//www.freelists.org/archives/si-list
> >> Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >>
> >>
> >
> >
> >__________________________________________________
> >Do You Yahoo!?
> >Spot the hottest trends in music, movies, and more.
> >http://buzz.yahoo.com/
> >------------------------------------------------------------------
> >To unsubscribe from si-list:
> >si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> >For help:
> >si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >
> >List archives are viewable 
> at:     //www.freelists.org/archives/si-list
> >Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >
> >
> >
>John L. Prince, PhD
>Professor
>Director,Center for Electronic Packaging Research
>Department of Electrical and Computer Engineering
>University of Arizona
>1230 E. Speedway
>Tucson, AZ 85721-104
>prince@xxxxxxxxxxxxxxx
>520-621-6187
>520-621-2999(FAX)
>
>------------------------------
>
>From: "Yibing Tang" <ytang@xxxxxxxxxxxxxxxxx>
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>Date: Mon, 18 Jun 2001 14:16:09 -0700
>
>
>That's too hot. Anyway, I learn the "history" of SI.
> From my understanding, SI just means digital guys are now getting familiar
>with some concepts of microwave technology. Yibing
>
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx
>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Dr. John L. Prince
>Sent: Monday, June 18, 2001 1:51 PM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>
>
>
>The temptation is just too great!!  The endeavor we call SI now has been
>around possibly since the 50's, at major computer companies (or maybe just
>at one major computer company).  I first developed and taught a
>university-level class (at Clemson University) which included "SI" elements
>in 1977--it was in fact a class in high speed digital electronics, so it
>included the circuit characteristics as well it must in this area.  Bill
>Blood, thanks for help from your book!  In 1983 the situation was becoming
>more serious, and here at Arizona we started a class in packaging which
>included "SI" elements.  In 1984 we received major funding from SRC (which
>we still have, nearly 20 years later) to develop the science and algorithms
>behind what you now call "SI".  Around 200 papers dating back to 1986, and
>numerous graduate students(dating back to 1986), have come out of this
>effort.  Since 1990 or so  there are other university programs (but not
>very many) which also address this area.
>
>So, there is little new under the sun today, just new names for things.
>And, just more fun to be had in a neat field.  John Prince
>
>At 06:45 PM 06/15/2001 -0700, you wrote:
> >
> >Hi Esther,
> >
> >I am not sure if you are aware but Signal Integrity did show up until
>94-95.
> >The only person to satisfy your requirements is Howard Johnson aka author
>of
> >first book on SI "Book of Black Magic".  What I am trying to say is that
>your
> >post will make some people laugh.  Don't worry you are not the first one
>with
> >similar post.  What you should have wrought is "8 years of high speed PCB
>board
> >design with emphasis on signal integrity".  That would be more belivable.
> >The SI wasn't issue at lower speeds.  It has shown up in last few years as
>a
> >mayor issue.  I have been working on SI and I can tell you there aren't
>that
> >many people who really know SI.  You should look for a person who has
>designed
> >whole lot of backplanes and who has done SI simulations on their own (not
> >someone who got other people to do it for them).
> >
> >I hope this helps you.  And I hope you find right person for the job.
> >
> >
> >Regards,
> >Bo
> >
> >p.s. If you need help being more specific in your search feel free to
>contact
> >me.
> >p.p.s.  I am not looking for a job and I probably wouldn't fit your
> >qualifications.  I am just trying to help.
> >
> >--- esther williams <estherw2000@xxxxxxxxx> wrote:
> >>
> >> Hello - The following is a SI position at an Optical Data Networking
>start
> >> up.
> >>
> >> Please contact: Esther at ewilliams@xxxxxxxxxxxx for more information.
> >>
> >> Title: Senior Signal Integrity Engineer
> >>
> >> Location: Mountain View, CA
> >>
> >> Job Description:
> >>
> >> - Specify, simulate, design and analyze high speed interfaces for data
> >> networking systems.
> >>
> >> - Verification of actual hardware and confirm the simulations results to
> >> guarantee integrity of all the high speed interfaces.
> >>
> >> - Generate guide lines for board designers and layout designers for the
>high
> >> speed routing.
> >>
> >> - Setup process to sign off layouts for PCB fabs.
> >>
> >> Position Requirements:
> >>
> >> - Experience with high speed IOs like LVDS, HSTL, SSTL, LVTTL, CML, PECL.
> >>
> >> - Familiar with high speed bus interfaces.
> >>
> >> - Knowledgeable with ASIC design flow and IO selection process.
> >>
> >> - Extensive use of SPICE and IBIS to simulate signal integrity for the
>high
> >> speed board.
> >>
> >> - Experience with QUAD like tools to sign off PCB layout designs.
> >>
> >> - Multi-gigabit board design and EMI/EMC containment techniques.
> >>
> >> - Defined impedance controlled PCB stack-ups and familiar with
>fabrication
> >> process and backplane designs.
> >>
> >> - MSEE or PhD.
> >>
> >> - 8 + years experience in signal integrity.
> >>
> >>
> >>
> >> ---------------------------------
> >> Do You Yahoo!?
> >> Yahoo! Buzz Index - Spot the hottest trends in music, movies,and more.
> >>
> >> ------------------------------------------------------------------
> >> To unsubscribe from si-list:
> >> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> >> For help:
> >> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >>
> >> List archives are viewable at:
>//www.freelists.org/archives/si-list
> >> Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >>
> >>
> >
> >
> >__________________________________________________
> >Do You Yahoo!?
> >Spot the hottest trends in music, movies, and more.
> >http://buzz.yahoo.com/
> >------------------------------------------------------------------
> >To unsubscribe from si-list:
> >si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> >For help:
> >si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >
> >List archives are viewable at:
>//www.freelists.org/archives/si-list
> >Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >
> >
> >
>John L. Prince, PhD
>Professor
>Director,Center for Electronic Packaging Research
>Department of Electrical and Computer Engineering
>University of Arizona
>1230 E. Speedway
>Tucson, AZ 85721-104
>prince@xxxxxxxxxxxxxxx
>520-621-6187
>520-621-2999(FAX)
>------------------------------------------------------------------
>To unsubscribe from si-list:
>si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>For help:
>si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
>List archives are viewable at:     //www.freelists.org/archives/si-list
>Old list archives are viewable at: http://www.qsl.net/wb6tpu
>
>
>
>------------------------------
>
>From: "Kai, Francis" <francis.kai@xxxxxxxxx>
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>Date: Mon, 18 Jun 2001 14:21:27 -0700
>
>
>After Mike Conn and Prof. Prince have addressed the history of SI, I would
>suggest the original advertiser, Optical Data Networking, or other hiring
>companies, to put down the knowledge of the history of SI as one of the
>"Position Requirement".
>
>I used to be a teacher and I know it is very important for a student or a
>working engineer to know the history of his/her own field. The knowledge
>will help the student or engineer to know the progress and development of
>this particular branch of science. When a complicated problem pops up in
>his/her lab or simulation run, he/she can trace this problem to the related
>area and solve the problem. I am happy to see there are many gurus in the
>[SI-LIST] to help younger engineers with history to solve their problems.
>
>Signal integrity is a "neat field", as pointed out by Prof. Prince. Working
>engineers need continuous help from professional consultants and gurus to
>learn this field.
>
>Francis Kai
>
>-----Original Message-----
>From: Dr. John L. Prince [mailto:prince@xxxxxxxxxxxxxxx]
>Sent: Monday, June 18, 2001 1:51 PM
>To: si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>
>
>
>The temptation is just too great!!  The endeavor we call SI now has been
>around possibly since the 50's, at major computer companies (or maybe just
>at one major computer company).  I first developed and taught a
>university-level class (at Clemson University) which included "SI" elements
>in 1977--it was in fact a class in high speed digital electronics, so it
>included the circuit characteristics as well it must in this area.  Bill
>Blood, thanks for help from your book!  In 1983 the situation was becoming
>more serious, and here at Arizona we started a class in packaging which
>included "SI" elements.  In 1984 we received major funding from SRC (which
>we still have, nearly 20 years later) to develop the science and algorithms
>behind what you now call "SI".  Around 200 papers dating back to 1986, and
>numerous graduate students(dating back to 1986), have come out of this
>effort.  Since 1990 or so  there are other university programs (but not
>very many) which also address this area.
>
>So, there is little new under the sun today, just new names for things.
>And, just more fun to be had in a neat field.  John Prince
>
>At 06:45 PM 06/15/2001 -0700, you wrote:
> >
> >Hi Esther,
> >
> >I am not sure if you are aware but Signal Integrity did show up until
>94-95.
> >The only person to satisfy your requirements is Howard Johnson aka author
>of
> >first book on SI "Book of Black Magic".  What I am trying to say is that
>your
> >post will make some people laugh.  Don't worry you are not the first one
>with
> >similar post.  What you should have wrought is "8 years of high speed PCB
>board
> >design with emphasis on signal integrity".  That would be more belivable.
> >The SI wasn't issue at lower speeds.  It has shown up in last few years as
>a
> >mayor issue.  I have been working on SI and I can tell you there aren't
>that
> >many people who really know SI.  You should look for a person who has
>designed
> >whole lot of backplanes and who has done SI simulations on their own (not
> >someone who got other people to do it for them).
> >
> >I hope this helps you.  And I hope you find right person for the job.
> >
> >
> >Regards,
> >Bo
> >
> >p.s. If you need help being more specific in your search feel free to
>contact
> >me.
> >p.p.s.  I am not looking for a job and I probably wouldn't fit your
> >qualifications.  I am just trying to help.
> >
> >--- esther williams <estherw2000@xxxxxxxxx> wrote:
> >>
> >> Hello - The following is a SI position at an Optical Data Networking
>start
> >> up.
> >>
> >> Please contact: Esther at ewilliams@xxxxxxxxxxxx for more information.
> >>
> >> Title: Senior Signal Integrity Engineer
> >>
> >> Location: Mountain View, CA
> >>
> >> Job Description:
> >>
> >> - Specify, simulate, design and analyze high speed interfaces for data
> >> networking systems.
> >>
> >> - Verification of actual hardware and confirm the simulations results to
> >> guarantee integrity of all the high speed interfaces.
> >>
> >> - Generate guide lines for board designers and layout designers for the
>high
> >> speed routing.
> >>
> >> - Setup process to sign off layouts for PCB fabs.
> >>
> >> Position Requirements:
> >>
> >> - Experience with high speed IOs like LVDS, HSTL, SSTL, LVTTL, CML, PECL.
> >>
> >> - Familiar with high speed bus interfaces.
> >>
> >> - Knowledgeable with ASIC design flow and IO selection process.
> >>
> >> - Extensive use of SPICE and IBIS to simulate signal integrity for the
>high
> >> speed board.
> >>
> >> - Experience with QUAD like tools to sign off PCB layout designs.
> >>
> >> - Multi-gigabit board design and EMI/EMC containment techniques.
> >>
> >> - Defined impedance controlled PCB stack-ups and familiar with
>fabrication
> >> process and backplane designs.
> >>
> >> - MSEE or PhD.
> >>
> >> - 8 + year's experience in signal integrity.
> >>
> >>
> >>
> >> ---------------------------------
> >> Do You Yahoo!?
> >> Yahoo! Buzz Index - Spot the hottest trends in music, movies,and more.
> >>
> >> ------------------------------------------------------------------
> >> To unsubscribe from si-list:
> >> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> >> For help:
> >> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >>
> >> List archives are viewable at:
>//www.freelists.org/archives/si-list
> >> Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >>
> >>
> >
> >
> >__________________________________________________
> >Do You Yahoo!?
> >Spot the hottest trends in music, movies, and more.
> >http://buzz.yahoo.com/
> >------------------------------------------------------------------
> >To unsubscribe from si-list:
> >si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> >For help:
> >si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >
> >List archives are viewable at:
>//www.freelists.org/archives/si-list
> >Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >
> >
> >
>John L. Prince, PhD
>Professor
>Director,Center for Electronic Packaging Research
>Department of Electrical and Computer Engineering
>University of Arizona
>1230 E. Speedway
>Tucson, AZ 85721-104
>prince@xxxxxxxxxxxxxxx
>520-621-6187
>520-621-2999(FAX)
>------------------------------------------------------------------
>To unsubscribe from si-list:
>si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>For help:
>si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
>List archives are viewable at:     //www.freelists.org/archives/si-list
>
>Old list archives are viewable at: http://www.qsl.net/wb6tpu
>
>
>
>
>------------------------------
>
>Date: Mon, 18 Jun 2001 14:43:23 -0700
>From: George James <george@xxxxxxxxxxxxxxxx>
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>
>
>Some of us real old timers even remember the early days of ECL.  SI has
>been around for a long time and for awhile it was a lost art.   Really good
>to see the expertise be passe on with the increased need with todays
>lighting bolt edge rates and frequencies.
>
>At 01:51 PM 6/18/01 -0700, Dr. John L. Prince wrote:
>
> >The temptation is just too great!!  The endeavor we call SI now has been
> >around possibly since the 50's, at major computer companies (or maybe just
> >at one major computer company).  I first developed and taught a
> >university-level class (at Clemson University) which included "SI" elements
> >in 1977--it was in fact a class in high speed digital electronics, so it
> >included the circuit characteristics as well it must in this area.  Bill
> >Blood, thanks for help from your book!  In 1983 the situation was becoming
> >more serious, and here at Arizona we started a class in packaging which
> >included "SI" elements.  In 1984 we received major funding from SRC (which
> >we still have, nearly 20 years later) to develop the science and algorithms
> >behind what you now call "SI".  Around 200 papers dating back to 1986, and
> >numerous graduate students(dating back to 1986), have come out of this
> >effort.  Since 1990 or so  there are other university programs (but not
> >very many) which also address this area.
> >
> >So, there is little new under the sun today, just new names for things.
> >And, just more fun to be had in a neat field.  John Prince
> >
> >At 06:45 PM 06/15/2001 -0700, you wrote:
> > >
> > >Hi Esther,
> > >
> > >I am not sure if you are aware but Signal Integrity did show up until
> > 94-95.
> > >The only person to satisfy your requirements is Howard Johnson aka 
> author of
> > >first book on SI "Book of Black Magic".  What I am trying to say is that
> > your
> > >post will make some people laugh.  Don't worry you are not the first one
> > with
> > >similar post.  What you should have wrought is "8 years of high speed PCB
> >board
> > >design with emphasis on signal integrity".  That would be more belivable.
> > >The SI wasn't issue at lower speeds.  It has shown up in last few 
> years as a
> > >mayor issue.  I have been working on SI and I can tell you there 
> aren't that
> > >many people who really know SI.  You should look for a person who has
> >designed
> > >whole lot of backplanes and who has done SI simulations on their own (not
> > >someone who got other people to do it for them).
> > >
> > >I hope this helps you.  And I hope you find right person for the job.
> > >
> > >
> > >Regards,
> > >Bo
> > >
> > >p.s. If you need help being more specific in your search feel free to
> > contact
> > >me.
> > >p.p.s.  I am not looking for a job and I probably wouldn't fit your
> > >qualifications.  I am just trying to help.
> > >
> > >--- esther williams <estherw2000@xxxxxxxxx> wrote:
> > >>
> > >> Hello - The following is a SI position at an Optical Data Networking 
> start
> > >> up.
> > >>
> > >> Please contact: Esther at ewilliams@xxxxxxxxxxxx for more information.
> > >>
> > >> Title: Senior Signal Integrity Engineer
> > >>
> > >> Location: Mountain View, CA
> > >>
> > >> Job Description:
> > >>
> > >> - Specify, simulate, design and analyze high speed interfaces for data
> > >> networking systems.
> > >>
> > >> - Verification of actual hardware and confirm the simulations results to
> > >> guarantee integrity of all the high speed interfaces.
> > >>
> > >> - Generate guide lines for board designers and layout designers for the
> >high
> > >> speed routing.
> > >>
> > >> - Setup process to sign off layouts for PCB fabs.
> > >>
> > >> Position Requirements:
> > >>
> > >> - Experience with high speed IOs like LVDS, HSTL, SSTL, LVTTL, CML, 
> PECL.
> > >>
> > >> - Familiar with high speed bus interfaces.
> > >>
> > >> - Knowledgeable with ASIC design flow and IO selection process.
> > >>
> > >> - Extensive use of SPICE and IBIS to simulate signal integrity for the
> > high
> > >> speed board.
> > >>
> > >> - Experience with QUAD like tools to sign off PCB layout designs.
> > >>
> > >> - Multi-gigabit board design and EMI/EMC containment techniques.
> > >>
> > >> - Defined impedance controlled PCB stack-ups and familiar with 
> fabrication
> > >> process and backplane designs.
> > >>
> > >> - MSEE or PhD.
> > >>
> > >> - 8 + year's experience in signal integrity.
> > >>
> > >>
> > >>
> > >> ---------------------------------
> > >> Do You Yahoo!?
> > >> Yahoo! Buzz Index - Spot the hottest trends in music, movies,and more.
> > >>
> > >> ------------------------------------------------------------------
> > >> To unsubscribe from si-list:
> > >> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> > >> For help:
> > >> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> > >>
> > >> List archives are viewable at:
> >//www.freelists.org/archives/si-list
> > >> Old list archives are viewable at: http://www.qsl.net/wb6tpu
> > >>
> > >>
> > >
> > >
> > >__________________________________________________
> > >Do You Yahoo!?
> > >Spot the hottest trends in music, movies, and more.
> > >http://buzz.yahoo.com/
> > >------------------------------------------------------------------
> > >To unsubscribe from si-list:
> > >si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> > >For help:
> > >si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> > >
> > >List archives are viewable
> > at:     //www.freelists.org/archives/si-list
> > >Old list archives are viewable at: http://www.qsl.net/wb6tpu
> > >
> > >
> > >
> >John L. Prince, PhD
> >Professor
> >Director,Center for Electronic Packaging Research
> >Department of Electrical and Computer Engineering
> >University of Arizona
> >1230 E. Speedway
> >Tucson, AZ 85721-104
> >prince@xxxxxxxxxxxxxxx
> >520-621-6187
> >520-621-2999(FAX)
> >------------------------------------------------------------------
> >To unsubscribe from si-list:
> >si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
> >For help:
> >si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
> >
> >List archives are viewable at:     //www.freelists.org/archives/si-list
> >Old list archives are viewable at: http://www.qsl.net/wb6tpu
> >
>
>
>------------------------------
>
>From: Robison Michael R CNIN <Robison_M@xxxxxxxxxxxxxx>
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>Date: Mon, 18 Jun 2001 17:19:15 -0500
>
>
>i kinda get the feeling that its the other way around...  a true SI guy is a
>
>microwave guy who's turned digital.  ;-)  all the digital guys that pick up
>on a little microwave are just SI wannabe's.
>
>miker
>
>p.s.  i'm a digital guy and the above is said tongue-in-cheek.
>
> > -----Original Message-----
> > From: Yibing Tang [SMTP:ytang@xxxxxxxxxxxxxxxxx]
> > Sent: Monday, June 18, 2001 4:16 PM
> > To:   si-list@xxxxxxxxxxxxx
> > Subject:      [SI-LIST] Re: SI Position Open READ THIS!!!!
> >
> >
> > That's too hot. Anyway, I learn the "history" of SI.
> > From my understanding, SI just means digital guys are now getting familiar
> > with some concepts of microwave technology. Yibing
> >
> >
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx
> > [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Dr. John L. Prince
> > Sent: Monday, June 18, 2001 1:51 PM
> > To: si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
> >
> >
> >
> > The temptation is just too great!!  The endeavor we call SI now has been
> > around possibly since the 50's, at major computer companies (or maybe just
> > at one major computer company).  I first developed and taught a
> > university-level class (at Clemson University) which included "SI"
> > elements
> > in 1977--it was in fact a class in high speed digital electronics, so it
> > included the circuit characteristics as well it must in this area.  Bill
> > Blood, thanks for help from your book!  In 1983 the situation was becoming
> > more serious, and here at Arizona we started a class in packaging which
> > included "SI" elements.  In 1984 we received major funding from SRC (which
> > we still have, nearly 20 years later) to develop the science and
> > algorithms
> > behind what you now call "SI".  Around 200 papers dating back to 1986, and
> > numerous graduate students(dating back to 1986), have come out of this
> > effort.  Since 1990 or so  there are other university programs (but not
> > very many) which also address this area.
> >
> > So, there is little new under the sun today, just new names for things.
> > And, just more fun to be had in a neat field.  John Prince
> >
> > At 06:45 PM 06/15/2001 -0700, you wrote:
> > >
> > >Hi Esther,
> > >
> > >I am not sure if you are aware but Signal Integrity did show up until
> > 94-95.
> > >The only person to satisfy your requirements is Howard Johnson aka author
> > of
> > >first book on SI "Book of Black Magic".  What I am trying to say is that
> > your
> > >post will make some people laugh.  Don't worry you are not the first one
> > with
> > >similar post.  What you should have wrought is "8 years of high speed PCB
> > board
> > >design with emphasis on signal integrity".  That would be more belivable.
> > >The SI wasn't issue at lower speeds.  It has shown up in last few years
> > as
> > a
> > >mayor issue.  I have been working on SI and I can tell you there aren't
> > that
> > >many people who really know SI.  You should look for a person who has
> > designed
> > >whole lot of backplanes and who has done SI simulations on their own (not
> > >someone who got other people to do it for them).
> > >
> > >I hope this helps you.  And I hope you find right person for the job.
> > >
> > >
> > >Regards,
> > >Bo
> > >
> > >p.s. If you need help being more specific in your search feel free to
> > contact
> > >me.
> > >p.p.s.  I am not looking for a job and I probably wouldn't fit your
> > >qualifications.  I am just trying to help.
> > >
> > >--- esther williams <estherw2000@xxxxxxxxx> wrote:
> > >>
> > >> Hello - The following is a SI position at an Optical Data Networking
> > start
> > >> up.
> > >>
> > >> Please contact: Esther at ewilliams@xxxxxxxxxxxx for more information.
> > >>
> > >> Title: Senior Signal Integrity Engineer
> > >>
> > >> Location: Mountain View, CA
> > >>
> > >> Job Description:
> > >>
> > >> - Specify, simulate, design and analyze high speed interfaces for data
> > >> networking systems.
> > >>
> > >> - Verification of actual hardware and confirm the simulations results
> > to
> > >> guarantee integrity of all the high speed interfaces.
> > >>
> > >> - Generate guide lines for board designers and layout designers for the
> > high
> > >> speed routing.
> > >>
> > >> - Setup process to sign off layouts for PCB fabs.
> > >>
> > >> Position Requirements:
> > >>
> > >> - Experience with high speed IOs like LVDS, HSTL, SSTL, LVTTL, CML,
> > PECL.
> > >>
> > >> - Familiar with high speed bus interfaces.
> > >>
> > >> - Knowledgeable with ASIC design flow and IO selection process.
> > >>
> > >> - Extensive use of SPICE and IBIS to simulate signal integrity for the
> > high
> > >> speed board.
> > >>
> > >> - Experience with QUAD like tools to sign off PCB layout designs.
> > >>
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>------------------------------
>
>Subject: [SI-LIST] Re: Voltage rating of a Ceramic capacitor
>From: "Ravinder Ajmani" <ajmani@xxxxxxxxxx>
>Date: Mon, 18 Jun 2001 16:47:02 -0600
>
>
>
>I would like to thank all of you who responded to my query on Ceramic
>capacitor voltage rating.  Based on the replies I received, I should choose
>a voltage rating of 2 times the application voltage.
>
>Regards, Ravinder
>PCB Development and Design Department
>IBM Corporation
>Email: ajmani@xxxxxxxxxx
>***************************************************************************
>Always do right.  This will gratify some people and astonish the rest.
>.... Mark Twain
>
>
>------------------------------
>
>From: Ed Priest <Ed_Priest@xxxxxxxxxxxxxx>
>Subject: [SI-LIST] Re: Inductance of Via
>Date: Mon, 18 Jun 2001 16:16:27 -0700
>
>
>Does this mean that the equation I have for a single plate capacitor isn't 
>valid either?
>
>Ed
>
>-----Original Message-----
>From: Tsuk, Michael [mailto:Michael.Tsuk@xxxxxxxxxx]
>Sent: Monday, June 11, 2001 7:38 AM
>To: si-list@xxxxxxxxxxxxx
>Cc: ytang@xxxxxxxxxxxxxxxxx
>Subject: [SI-LIST] Re: Inductance of Via
>
>
>
>Yibing Tang wrote:
>
> > I use a formula to calculate the inductance of through hole via,
> > L=5.08h[ln(4h/d)+1]
> > However, I find that it is not suitable for small ratio of h to d.
> From this
> > formula,if decrease the ratio, I could get very lower inductance, even
> > negative.
>
>It makes no sense to talk about the inductance of a via in isolation.
>None at all.  Inductance is a quality of a loop of current; without
>knowing where your return path is, you can't get a meaningful value for
>the total inductance.
>
>In any case, it seems that your formula isn't applicable to vias; this
>was discussed back in March.  See:
>
>http://www.qsl.net/wb6tpu/si-list/0117.html
>
> > My question is how far I can go to low the inductance.
>
>You have two main choices:
>
>1.  Bring the return path vias closer to the signal via
>2.  Shorten the length of the via
>
>The effect of the diameter is relatively weak.
>
>--
>Michael Tsuk
>Compaq AlphaServer Product Development
>(508) 467-4621
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>
>------------------------------
>
>Date: Mon, 18 Jun 2001 23:45:18 +0100
>From: Mike Ventham <ventham@xxxxxxxxxxxxxxxxx>
>Subject: [SI-LIST] Re: SI Position Open READ THIS!!!!
>
>
>
>The same seems to go for EMC engineers. I have met many who are 'old'
>analog engineers!
>
>At 23:19 18/06/01, you wrote:
>
> >i kinda get the feeling that its the other way around...  a true SI guy is a
> >
> >microwave guy who's turned digital.  ;-)  all the digital guys that pick up
> >on a little microwave are just SI wannabe's.
> >
> >miker
> >
> >p.s.  i'm a digital guy and the above is said tongue-in-cheek.
> >
> >(snipped for bandwidth)
>
>Regards
>
>Mike
>________________________________________________________________
>| Mike Ventham - Vice-President Engineering,                   |
>| Quantic EMC Inc.                  Headquarters               |
>| Croft House, Chilcompton,         191 Lombard Ave., Winnipeg,|
>| Somerset, UK, BA3 4JA             Manitoba, Canada R3B 0X1   |
>| Tel:    44 (0)1761 232191         Tel: (204) 942 4000        |
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>| Mobile: 44 (0)7971 553260                                    |
>| Email: ventham@xxxxxxxxxxxxxxxxx  http://www.quantic-emc.com |
>
>
>
>------------------------------
>
>From: RCSXC@xxxxxxx
>Date: Mon, 18 Jun 2001 21:24:12 EDT
>Subject: [SI-LIST] Re: Improve the heat on a PCB
>
>What exactly is your application? If you have transistor drivers on the board
>then you must try to heat sink them properly. The technique depends upon the
>driver. Don't attempt to bring the heat into the interior layers unless it
>goes onto a large plane like ground, that can be exposed on the outer layers
>to air. You can also use heavier copper on the PCB. An application for a
>board that I'm working on must be able to handle 150 amps of current through
>it, for safety the copper is 6 oz. Best idea is to get the heat out quickly
>if possible. Also make sure that you are not stressing components that
>generate the heat by running them too close to their maximum power limits.
>Many ICs (including regulators) will thermally turn off if their junction
>temps exceed about 150 C.
>
>
>
>------------------------------
>
>End of si-list Digest V1 #27
>****************************


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