Hello, In Intel's CPU model, there is a model selector, which has following 5 model. In simulation, do I need to try all 5 models? dtn_typ Nominal resitance; High VCC with fast slewrate | Low VCC with slow slewrate dtn_low_hfast Low resistance; High VCC with fast slewrate | Low VCC with slow slewrate dtn_low_hslow Low resistance; High VCC with slow slewrate | Low VCC with fast slewrate dtn_high_hfast High resistance; High VCC with fast slewrate | Low VCC with slow slewrate dtn_high_hslow High resistance; High VCC with slow slewrate | Low VCC with fast slewrate B.R. Astrom ___________________________________________________________ 雅虎免费G邮箱-中国第一绝无垃圾邮件骚扰超大邮箱 http://cn.mail.yahoo.com ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu