[SI-LIST] Re: impedance mismatch

  • From: Krina Kothari <krinakothari@xxxxxxxxx>
  • To: for_si2003@xxxxxxxxx, clandrum@xxxxxxxxx,"'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 5 Nov 2003 11:29:39 -0800 (PST)

Hi;

Use Hyperlynx to carry out simulations.  It is  the
best tool for beginners.  

Regards;
Krina Kothari


--- V S <for_si2003@xxxxxxxxx> wrote:
> <Assuming that IC1 is the source and IC2 is the
> receiver ALL OF THE TIME, I  would simply series
> terminate the transmission line  as close to IC1 as
> possible.>
> 
> I believe the result will hold good even if IC2 is
> the
> transmitter and IC1 is the receiver.
> 
> Simulation should be performed for confirmation. 
> 
> V S
> 
> 
> --- Chris Landrum x311 <clandrum@xxxxxxxxx> wrote:
> > Assuming that IC1 is the source and IC2 is the
> > receiver ALL OF THE TIME, I
> > would simply series terminate the transmission
> line
> > as close to IC1 as
> > possible.  A 25 Ohm resistor should make up the
> > difference.
> > 
> > -----Original Message-----
> > From: Chin, Dominic Kin Hii
> > [mailto:dominic.kin.hii.chin@xxxxxxxxx]
> > Sent: Wednesday, November 05, 2003 3:05 AM
> > To: si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] impedance mismatch 
> > 
> > 
> > 
> > 
> > 
> > Hi experts,
> > I am doing PCB design to communicate IC1 to IC2.
> The
> > termination of
> > these ICs:
> > 
> > IC1 buffer: 25 ohm
> > IC2 buffer: 50 ohm
> > 
> > If I use a 50 ohm trace, there will be impedance
> > mismatch and reflection
> > at IC1 or vice versa. How should I design PCB to
> > cater for these
> > different terminated impedance ICs?=20
> > 
> > Thanks
> > Dom
> >
>
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=====
krina kothari

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