[SI-LIST] effective plane isolation for Z-control
- From: "Kevin Buchanan" <buck@xxxxxxx>
- To: "Si-List" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 13 Sep 2004 14:37:03 -0400
Hi Gurus,
I'm working an interface board that is taking
single ended RGB signals and converting it to LVDS
at 30 KHz.
The stackup is:
t: diff / SE sigs
1: gnd
2: split 3.3, the LVDS part has filtered power
b: SE sigs
Skin depth indicates that the planes (1 oz) are not thick enough to
provide z-axis isolation between the sides.
My question is: due to the low clock speed, will the impedance
be affected by the split in the power plane?
Your insights will be appreciated.
Thank you in advance
Buck...
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