[SI-LIST] Re: control signals in DDR2
- From: "Mostafa Abdulla " <mostafa_abdulla@xxxxxxxxxxx>
- To: "Hany Fahmy " <hfahmy@xxxxxxxxxx>, "jennifer.maharani@xxxxxxxxx " <jennifer.maharani@xxxxxxxxx>, "si list silist " <si-list@xxxxxxxxxxxxx>
- Date: Thu, 24 Dec 2009 21:52:59 +0000
In LPDDR2, commands and addresses have separate power and ground named VSSCA
and VDDCA.
Sent via BlackBerry by AT&T
-----Original Message-----
From: Hany Fahmy <hfahmy@xxxxxxxxxx>
Date: Thu, 24 Dec 2009 21:37:24
To: <jennifer.maharani@xxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: control signals in DDR2
I think the same concept also apply to LPddr as well.
----- Original Message -----
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx>
To: si-list@xxxxxxxxxxxxx <si-list@xxxxxxxxxxxxx>
Sent: Thu Dec 24 12:46:43 2009
Subject: [SI-LIST] Re: control signals in DDR2
Hello,
Is this also valid for low power ddr?
many thanks,
Jenni
On Dec 24, 2009, at 8:29 PM, Hany Fahmy <hfahmy@xxxxxxxxxx> wrote:
> Another reason for address/command bus ref to Vdd instead of GND is
> to isolate the address/comman bus from the noise on GND due to DQ-
> SSO, it degrades the perf of address/command especiaLly if u want to
> run address/command at 1N mode which is much tighter voltage and
> timing margin.
> For ddr3, we have an isolated Vref-MA also ref to Vdd to carry the
> same noise signature of address/command signals but for ddr2, it is
> the same Vref for both address/command and DQ bus.
>
> Agree with Hermann that u do need to accurately model the return-
> path discontinuity if the signals make transitions and changes ref
> layers. Agree with Hermann that Momentum can accurately model it and
> improve the performance by adding enough stitching vias or RF shorts
> (coupling caps) close to the transistions.
>
> Hany Fahmy
> Nvidia Corporation
>
> ----- Original Message -----
> From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx>
> To: hermann.ruckerbauer@xxxxxxxxxxxxx <hermann.ruckerbauer@xxxxxxxxxxxxx
> >
> Cc: prasad <hariprasad.palli@xxxxxxxxx>; si-list@xxxxxxxxxxxxx
> <si-list@xxxxxxxxxxxxx
> >
> Sent: Thu Dec 24 03:09:35 2009
> Subject: [SI-LIST] Re: control signals in DDR2
>
> At the Manor SI Laboratories it was said that all RF shorts were
> equal.
> Some RF shorts were more equal than others.
>
> Steve.
> Hermann Ruckerbauer wrote:
>> Hi,
>>
>> The VDD (not VTT) return path for CCA (Control/Command/Address) bus
>> was
>> choosen due to the pincount limitation on the Connectors.
>> In order to have enough VDD pins the VDD pins have been chosen to
>> provide the shielding and return path for this bus.
>>
>> Effects in simulation: as long as you have a good Power plane it is
>> as
>> good as a GND plane. In any case a nice RF Short between Power and
>> GND
>> should be created everywhere where a change of the return current
>> between Power and GND is happening.
>> If you want to consider it you need to extract a complete model where
>> Return path is considererd e. g. by a 2.5D Field solver as Momentum.
>>
>> Many simulators (LineSim and ADS schematic sim) assume an ideal
>> return
>> path anyhow ...
>>
>>
>> regards
>>
>> Hermann
>>
>> EKH - EyeKnowHow
>> Hermann Ruckerbauer
>> www.EyeKnowHow.de <http://www.EyeKnowHow.de>
>> Hermann.Ruckerbauer@xxxxxxxxxxxxx
>> Veilchenstrasse 1
>> 94554 Moos
>> Tel.: +49 (0)9938 / 902 083
>> Mobile: +49 (0)176 / 787 787 77
>> Fax: +49 (0)3212 / 121 9008
>>
>>
>>
>> steve weir schrieb:
>>
>>> They are to allow for low cost continuous return path on all DDR
>>> signals.
>>>
>>> Steve.
>>> prasad wrote:
>>>
>>>
>>>> Hi All,
>>>> please suggest why the control signals in the DDR2 are referred
>>>> to VTT
>>>> instead of GND?
>>>>
>>>> what are the affects , if this is not considered in simulation
>>>> and instead
>>>> referring to GND is used?
>>>>
>>>> thanking you all in advance....
>>>>
>>>>
>>>> Best Regards,
>>>> prasad...
>>>>
>>>>
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