[SI-LIST] basic doubt in board design

  • From: "Gopalakrishnan Sethuraj" <gopalakrishnan.sethuraj@xxxxxxxxx>
  • To: <hassan@xxxxxxxx>
  • Date: Sat, 7 Dec 2002 12:52:07 +0530

hai 

I have some basic doubt in the high speed board design.

1.What is victim net?

2.What is physical rule ,electrical rule and parallelism rule?

3.what is capacitive and inductive impedence,how it will affect the signal 
quality?

4.how to find out the transmission line impedence.

5.Under what condition the normal signal(low speed) will become an transmission 
signal line(high speed)?

6.When to use 16/32 bit buffer(or)driver for processor bus lines,what is the 
need for?

7.What is aggressor nets?

8.What is Flight time?



Regards
Gopalakrishnan.S
Project Engineer
Wipro Technologies 
Lakshmi buliding,Begumpet,
Secunderabad-500003 
Tel-91-40-27906008,Ext-4625 
Fax-91-40-27907123



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