[SI-LIST] Re: Why do we still TDR pcbs

  • From: "Jeff Loyer SI" <jeff.loyer.si@xxxxxxxxxxx>
  • To: <dmarc-noreply@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Thu, 20 Aug 2015 08:52:37 -0700

Hello Lenny,
In response to your original posting (why measure characteristic impedance
on PCB's instead of return loss), I would have said that it's because we
model the PCB trace as a transmission line with a particular impedance, and
we want to ensure what we've built agrees with what we modeled. You won't
find a t-line model labelled as "-20dB @ 10GHz", for instance. That's
dependent on the system it's installed in, where characteristic impedance
isn’t. At some point we may have to understand the effects of
micro-variations in PCB impedance and model accordingly, but I think that
would be too compute intensive and we'll go to a different transmission
medium by then.
Regarding material insertion loss variation, the paper "A Study of PCB
Insertion Loss Variation in Manufacturing Using a New Low Cost Metrology" by
Chu-tien (Jerry) Chia, Richard Kunze, and others is the only one I'm aware
of to address that issue. Note that this study focused on higher loss
materials so be careful not to extend its conclusions to low loss materials,
where we've seen more variation including correlation between impedance and
insertion loss.
Vendors today only have specifications for minimum and maximum insertion
loss (typically the minimum value is not critical), no spec. on deviation is
given. Those loss specs. are given for each particular trace impedance,
layer, and dimension.

Jeff Loyer
Signal Integrity Engineering

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of L R (Redacted sender "digitalchkn@yahoo" for DMARC)
Sent: Wednesday, August 19, 2015 3:24 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Why do we still TDR pcbs

Hi all,
Appreciate informative feedback on this. It looks like Oracle paper
sums up the root of my question - and actually opens up the second aspect
of all this is that we'd like to assure material loss variations.  Anyone
else out there requesting their suppliers for this details? If yes, what is
the most common format shared by the suppliers? What are loss common loss
deviation targets?
Thanks,Lenny R


On Wednesday, August 19, 2015 12:31 PM, "Grasso, Charles"
<Charles.Grasso@xxxxxxxxxxxx> wrote:


Trust but verify!
Best Regards
Charles Grasso
Compliance Engineer
Echostar Communications
(w) 303-706-5467
(c) 303-204-2974
(t) 3032042974@xxxxxxxxx
(e) charles.grasso@xxxxxxxxxxxx
(e2) chasgrasso@xxxxxxxxx


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of L R
Sent: Tuesday, August 18, 2015 3:15 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Why do we still TDR pcbs

  Hi folks,
See lots of discussion this month on whether SI has become commoditized.
I'll hold off my thoughts on that... and instead ask my
"too-ashamed-to-ask-but-will-ask-anyways" question.
The question is this. Why do we still insist on board impedance data from
our PCB manufacturers?
Here's the rationale behind this question  As we all know too well, PCB
trace impedance is not a nice constant real value (say 50 ohms) so we can't
really expect a single number(right?). And with that said, PCB
manufactures never provide us with the details of their measurement (edge
rates, launches, ref planes anyone?).  They just give us a number saying
they are within 10%. Great.  We know nothing from this other than I can
sleep better at night knowing my, say, single ended clocks will work fine.
Well, how useful is all that for links designed for my fancy 10Gbps or
more? Wouldn't it be more useful for them to give us S11/22?
- Lenny

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