[SI-LIST] Re: What does an unpowered FPGA output look like on a TDR - pkg RLC only?

  • From: "Alfred P. Neves" <al@xxxxxxxxxxxxxxxxx>
  • To: jnieznan@xxxxxxxxxx
  • Date: Fri, 4 Sep 2015 08:02:44 -0700

Teraspeed Labs in Portland OR does all of our TDR testing for our Channel
Modeling Platforms. I would call them. They do a great job for us.





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On Sep 4, 2015, at 7:39 AM, Nieznanski, John - Harris <jnieznan@xxxxxxxxxx>
wrote:

Hello SI-list!
Trying to figure out if an unpowered, area array FPGA output is connected to
PCB using TDR. I thought I might try to get an unmounted device to get a
baseline TDR signature for the unpowered FPGA output, but I don't have one
yet.

Besides the package RLC parastitics, I'm thinking the unpowered device output
is likely going to look just like an open circuit. Do you agree? Was hoping
that maybe the ESD diodes would show up as a low impedance shunt to ground ,
but the TDR step is probably too small and too fast to trigger any ESD diodes
to conduct.

Does anybody have any other ideas?

Thanks !



John Nieznanski
Sr. Staff Engineer
Electronics Design, Assembly, Integration and Test
Geospatial Systems

Exelis Inc., a wholly owned subsidiary of Harris Corp.


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