Ben,
Thanks a lot, Picotest has done a lot of very good work!! I wish Agilent with
ADS would do some work like you do!!
PS.
VRM are very important!! I wish near threshold switching would have gotten some
traction it has the potential of reducing CMOS Power Consumption.
-Lyndell Lee Asbenson
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On ;
Behalf Of Benjamin Dannan
Sent: Thursday, February 9, 2023 10:35 AM
To: SI-LIST <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: VRM Modeling through measurements
Here are some other links of interest. Courtesy of Picotest.
*Learn about Power Supply/VRM Modeling for Switchers and Linears*
·
*VRM Modeling: A Strategy to Survive the Collision of Three Worlds, SIJ,
November 21, 2018*
https://www.signalintegrityjournal.com/articles/1017-vrm-modeling-a-strategy-to-survive-the-collision-of-three-worlds
· *Measurement Based VRM Modeling, 2017 IEEE 21st Workshop on
Signal and Power Integrity (SPI), IEEE, May 2017 IEEE 21st Workshop on Signal
and Power Integrity (SPI)*
https://ieeexplore.ieee.org/document/7944009
https://www.picotest.com/downloads/Measurement-Base-VRM-Model-Tutorial-Final-2017.pdf
· *Video: Measurement-Based, Harmonic Balance VRM M**odel, DGCon
April 2020*, A unified, fast-simulating, Harmonic Balance VRM simulation model
is introduced. it supports discontinuous, continuous, and forced continuous
conduction modes for voltage mode, voltage mode feed-forward and current mode
control.
https://youtu.be/QtPCyiR4QmY
https://www.picotest.com/blog/video-measurement-based-harmonic-balance-vrm-model/
· *Characterizing and Selecting the VRM, SIJ, April 25, 2018*
https://www.signalintegrityjournal.com/articles/831-characterizing-and-selecting-the-vrm
· *Characterizing the VRM, EDIcon Online, Sept. 2019*
https://event.on24.com/eventRegistration/EventLobbyServlet?targetþg20.jsp&partnerrefÿD3SS&eventid
52277&sessionidÿkey‰E0C982E79AD60E6B066ACF5CBEFA78®Tagÿourcepageþgister
· *Measurement Based VRM Model Tutorial Handout Final.pdf,
Picotest, May 2017*
Picotest Power Integrity Training Course Material, info@xxxxxxxxxxxx
· *Measuring and Interpreting Impedance Data, SIJ August, 2019*
https://event.on24.com/eventRegistration/EventLobbyServlet?targetþg20.jsp&referrerÿtps%3A%2F%2Fwww.signalintegrityjournal.com%2Fevents%2F99-measuring-and-interpreting-impedance-data&eventid
49545&sessionidÿkeyÚ37B34BE8615E5EA7FEB1101C3D0BF8®Tagÿourcepageþgister
· *Stability and Performance Improvement with Feedback in VRM
Transconductance Error Amplifiers*
*A Case Study using the Sandler State Space Average VRM Model, EDIcon Online,
October 2022*
https://event.on24.com/wcc/r/3867734/C61F1C0FEE1B6482C4EDFC4461CA91AB/3961609?partnerrefÿailShareFromReg&ms65088075252
· *Small Signal Models Small Signal Problems SIJ, NOV 2022*
https://www.signalintegrityjournal.com/articles/2898-small-signal-models-small-signal-problems
· *VRM Modeling and Stability Analysis for the Power Integrity
Engineer, DesignCon Feb 2023* *- Ballroom F, Ben Dannan (NGC), Heidi Barnes
(Keysight Technologies), Christian Yots (TI), Steve Sandler (Picotest),
*Wednesday, February 1 - 9:00 AM - 9:45 AM
https://dcon23.mapyourshow.com/8_0/sessions/session-details.cfm?scheduleidx&;
On Thu, Feb 9, 2023 at 10:23 AM Benjamin Dannan <ben@xxxxxxxxxxxxxxxxxxxxxxx>
wrote:
Hello Rajan,
What are you trying to do? Are you trying to build this model to use
in a design for sign-off in time-domain and frequency-domain analysis?
If so, I would not recommend using an R-L model. They aren't going to
provide the accuracy you need, specifically if you have
noise-sensitive circuits. As Steve Sandler teaches us, there are five
noise sources in a VRM. With a passive SPICE model (e.g. R-L or
R-L-R-L model), you only get one of those sources of noise in your
simulation. So if you're concerned by PSRR, that means an R-L model
will not give you that fidelity. Also, remember that the control loop
on your VRM has inductance which affects the output impedance of your
VRM. So if you measured the output impedance of a VRM with one control
loop design and then changed the control loop at all, your output
impedance will now be different on that model. See link below to an article
on the inductive nature of Voltage Control Loops by Steve Sandler:
Steve's EDN article the inductive nature of voltage control loops is a
good reference for linear regulators and KDO's (these are two
different things, though LDO is a class of linear regulators)
https://www.edn.com/the-inductive-nature-of-voltage-control-loops/
If all you want to do is create an R-L model that is easy to do with
an output measurement and then fit it to a SPICE model in an EDA tool.
Most EDA tools have some tuner or optimizer feature you can use to fit
your simulated model to a measured model.
As Gio recommended, I'd also recommend reading the paper that Steve,
Heidi Barnes, and I just presented at DesignCon 2023 titled "VRM
Modeling and Stability Analysis for the Power Integrity Engineer." In
this paper, we show why SPICE models (R-L) should not be used for
design sign-off or in power integrity designs today. When comparing an
R-L model with PCB effects to a state-space average VRM model that
includes the PCB effects, both VRM models have an almost identical
output impedance. When applying a step response to both of these VRM
models, we show a 47 dB higher contribution of noise from the
state-space average VRM model. That is because we do not get the other noise
sources from the R-L model.
Now keep in mind, in this paper, we focus on a buck regulator example.
I believe you are asking about an LDO. In this case, the methods shown
in our paper are similar; you want to make some measurements to
characterize the LDO's overall gain and output impedance properly.
From there, you need to understand the LDO's architecture. Most LDOs
today are series-pass architecture but not all. Some LDOs use internal FETs,
and some use BJTs.
From there, you can build a relatively simple model which you can dial
in using an error amplifier with a voltage reference, a FET (or BJT
depending on the LDO), and your feedback loop. LDO performance
(including output side inductance) is also operating current and
voltage-dependent. These will also change with tolerances, including
initial temperature and age (and radiation). Then you can include your
PCB effects with your PDN to have a much better model to use for
time-domain and frequency-domain analysis for your power integrity efforts.
Best Regards,
Ben
On Thu, Feb 9, 2023 at 10:13 AM Filip, Cristian
<cristian.filip@xxxxxxxxx>
wrote:
Hi Rajan,
Take a look here: https://www.picotest.com/ADSBook.html
The book is really worth buying and it answers many of the questions
you might have related to PI modeling.
Cristian
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx <si-list-bounce@xxxxxxxxxxxxx> On
Behalf Of Rajan Hansa
Sent: February 9, 2023 12:29 AM
To: SI-LIST <si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] VRM Modeling through measurements
Hello Experts,
In my recent project, I have been assigned to set up a flow for VRM
(dc-dc converter/ LDO) modeling through measurement. We are designing
a validation board to facilitate this process.
I have always used series R and L & Bulk decap to model VRM in PDN
simulations. I am unsure what parameters can be extracted from
measurement to model VRM. Although I have heard about bode plots and
step responses that can be generated to model VRM, I could not find
any good documents explaining this method.
Can someone help me better understand this topic or provide me with
some documents/papers that explain it in more detail?
Thanks in advance,
Rajan
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