[SI-LIST] Teraspeed at DesignCon
- From: Scott McMorrow <scott@xxxxxxxxxxxxx>
- To: silist <si-list@xxxxxxxxxxxxx>
- Date: Fri, 30 Jan 2009 09:35:14 -0500
For those who will be at DesignCon this year, we hope that you have the
opportunity to attend one of the papers or TecForums we are presenting.
http://www.designcon.com/2009/attendees/schedule/1_tf_ma_4.asp
Fixturing and Calibration Techniques for Obtaining Wide
Bandwidth-Measured Data for Time Domain Simulations and
Measurement-Based Modeling
Monday, February 2 | 9:00 am -- 12:00 pm
Heidi Barnes, Senior Consultant, Semiconductor Test Systems, Verigy
Fangyi Rao, Agilent Technologies
Tom Dagostino, Vice President, Device Modeling Division, Teraspeed
Sanjeev Gupta, Signal Integrity Applications Expert, Agilent Technologies
Al Neves, Senior Signal Integrity Engineer, Teraspeed
Mike Resso, Signal Integrity Applications Expert, Agilent Technologies
Bob Schaefer, R&D Project Manager, Agilent Technologies
The simple oscilloscope measurement techniques of the past are clearly
struggling with the transmission-line effects of multi-gigabit data
rates that are now commonplace in consumer products. The ability to
accurately measure the performance of an electrical component is
critical for guaranteeing its performance as a sub-element in a larger
system or for improving the accuracy of system simulations and
measurement-based models. This tutorial will focus on the practical side
of understanding calibration techniques for obtaining wide-bandwidth
data that is viable for use in time domain simulations and
measurement-based modeling.
http://www.designcon.com/2009/attendees/schedule/12_wa_1.asp
Measurement-Assisted Electromagnetic Extraction of Interconnect
Parameters on Low-Cost FR--4 boards for 6--20 Gbps Applications
Wednesday, February 4 | 8:30 am -- 9:10 am
Yuriy Shlepnev, President, Simberian
Alfred Neves, Senior Staff Signal Integrity Engineer, Teraspeed
Consulting Group
Tom Dagostino, Vice President Engineering, Teraspeed Labs
Scott McMorrow, President, Teraspeed Consulting
The presentation unites interconnect analysis and measure-based
verification implementing advanced TRL/LRM calibration along with
conditioning of the de-embedded S-parameters. We show practical test
cases on a FR4 board to 1 percent correspondence between full-wave
modeling and measurements. A test board with 30 test structures has been
fabricated and investigated experimentally and numerically over the
frequency band from 300 KHz to 20 GHz. To identify properties of the
materials, transmission line segments and resonant structures are used.
Broadband dielectric models are extracted by comparison of experimental
data with results of 3D full wave.
http://www.designcon.com/2009/attendees/schedule/10_th_2.asp
PCB Power Delivery Optimizations for the Cost-Driven Era
Thursday, February 5 | 9:50 am -- 10:30 am
Steve Weir, Member Technical Staff, Teraspeed Consulting Group/IPBLOX
Tom Dagostino, Vice President, Device Modeling Group, Teraspeed
Consulting Group
PCB--level power delivery involves choices in PCB laminates,
construction, bypass capacitor selection, and placement. We examine
currently available choices as they apply to realizing high-performance
power delivery while optimizing manufactured cost. We demonstrate
results using test vehicles built with current-generation ICs.
--
Scott McMorrow
Teraspeed Consulting Group LLC
121 North River Drive
Narragansett, RI 02882
(401) 284-1827 Business
(401) 284-1840 Fax
http://www.teraspeed.com
Teraspeed® is the registered service mark of
Teraspeed Consulting Group LLC
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