[SI-LIST] Switch Mode DC-DC Buck Regulator Efficiency
- From: Avtaar Singh <avtaarenator@xxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 18 May 2009 23:24:16 +0800
Gurus:
I am trying to create a MOSFET loss spreadsheet for a Switch Mode DC-DC buck
regulator. I had a few questions:
1) Should the conduction loss for the top and bottom MOSFET be thus:
PC = D (IO2 x RDSON-HI x 1.3) (High-Side) PC = (1 - D) x (IO2 x
RDSON-LOx 1.3) (Low-Side)
or thus:
PC = D2 (IO2 x RDSON-HI x 1.3) (High-Side) PC = (1 - D)2 x (IO2 x R
DSON-LO x 1.3) (Low-Side)
I am having a confusion that the 2nd set of formulae might be correct,
because the RMS current through the top MOSFET is DIO, and that through the
bottom MOSFET is (1-D)IO
2) Is the gate charging loss generally very low in comparison to the
switching loss and conduction loss for the bottom MOSFET? Will the gate
charging loss not be considerable if the QG of the MOSFET is very very high?
Regards,
Avtaar
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