[SI-LIST] Signal Integrity Opportunity in San Jose

From: "Ed Smay" <esmay@xxxxxxxxxxxxxxxxx>
To: <si-list@xxxxxxxxxxxxx>
Date: Wed, 9 Aug 2006 11:56:00 -0700
I have a new opening for a Signal Integrity Engineer and wanted to see who
might 
be available or interested.  Here is the information for the position and
look forward
to hearing from you.  Please send me a soft copy of your resume for review.
 
If you are currently not available, it would be greatly appreciated if you
would pass
this on to someone that you might know who would be interested.
 
Hope to hear from you soon.
 
 
Duties will include the following:
*       Modeling hi-speed I/O's, chip packages, printed circuit board
interconnects, and connectors with respect to parameters such as
reflections, crosstalk, ISI and designing to overcome these effects. 

*       Perform both timing and clock distribution analysis and design. 

*       Provide design constraints to PCB layout 

*       Perform post route simulations for timing and signal quality. 

*       Take and correlate lab measurements to simulations. 

*       Troubleshoot interface issues. 

Requirements:

*       BSEE degree with 5+ years experience in signal integrity analysis. 

*       Strong foundation in transmission line theory. 

*       Experience with spice simulation tools. 

*       Experience with board simulation tools (Cadence Specctraquest,
Mentor Graphics Hyperlynx, ICX, XTK). Experience with 3D modeling and model
validation software is a plus. 

*       Experience taking hi-speed laboratory measurements using the latest
oscilloscopes, Vector Network Analyzers, Spectrum Analyzers, Time Domain
Reflectometers and Bit Error Rate Testers. 

*       Strong understanding of PCB layout principles. 

*       Ability to work well with others in a team environment as well as
independently to setup printed circuit boards for simulation and lab
equipment for measurement. 

*       Good debugging skills. 

*       Excellent communication skills, both written and oral, as well as
exceptional design organizational skills. 

 

Ed Smay 
408-345-9100  Ext 101
408-230-3069  Cell 

esmay@xxxxxxxxxxxxxxxxx 


 

 


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[SI-LIST] Signal Integrity Opportunity in San Jose

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