[SI-LIST] Re: Senior Signal Integrity Jobs at Cisco, San Jose, CA

From: "Amit Agrawal (amiagra2)" <amiagra2@xxxxxxxxx>
To: "jim" <jimf@xxxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
Date: Tue, 31 Aug 2010 22:43:36 -0700
Hello,
This is a new position in my group. In the past one year I advertized in the 
"si-list" few times and have filled three positions. If anyone is interested in 
this new position, please send me your resume or call me for more detail.

Regards,
Amit

-----Original Message-----
From: jim [mailto:jimf@xxxxxxxxxxxxx] 
Sent: Thursday, August 26, 2010 8:00 PM
To: Amit Agrawal (amiagra2); Amit Agrawal (amiagra2); si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Senior Signal Integrity Jobs at Cisco, San Jose, CA


Hi All,
     This job is a phantom.

Jim Freeman

-----Original Message-----
>From: "Amit Agrawal (amiagra2)" <amiagra2@xxxxxxxxx>
>Sent: Aug 26, 2010 1:35 PM
>To: "Amit Agrawal (amiagra2)" <amiagra2@xxxxxxxxx>, si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Senior Signal Integrity Jobs at Cisco, San Jose, CA
>
>We are looking for a senior level signal integrity engineer in
>Enterprise Switching Technology Group (ESTG), Cisco, San Jose. The
>position is located in San Jose, CA. The description of the job
>requirements are given below. If you are interested, please send me your
>resume or contact me directly.
> 
>
>Best Regards,
>
> 
>
>Amit P. Agrawal, Ph.D.
>
>Senior Manager, Hardware Engineering
>
>Enterprise Switching Technology Group
>
>Cisco, San Jose, CA
>
>amiagra2@xxxxxxxxx
>
>(408) 424-2732 (Office)
>
>__________________________________________________________
>
> 
>
>JOB DESCRIPTION FOR TECHNICAL LEAD/SENIOR SIGNAL INTEGRITY ENGINEER
>
> 
>
>An experienced signal integrity engineer is being sought for design and
>analysis of high speed interfaces and power distribution network. The
>successful candidate will be part of signal integrity technology team
>and participate in the definition of chip, package, printed circuit
>board (PCB), and system interconnects.  Within a concurrent engineering
>environment, the individual will be part of a larger team with system
>architects, logic designers, ASIC engineers, and system SI engineers in
>creation of next generation networking products.
> 
> This group works on present and next-generation cost-sensitive yet high
>performance and high volume products.
> 
> Your responsibilities will include but not limited to: 
>
> 
>
>- Working experience in high speed serial I/O applications, PLLs, CDR,
>transceiver/SERDES operations
>- Definition of signaling and package technology for high performance
>ASICs
>- Simulating and/or analyzing and/or generating power delivery network
>requirements 
>- Understanding signal integrity and timing in order to budget and
>evaluate trade-offs between design parameters to determine a solution
>
>  space that is high volume manufacturability 
>- Generating the routing requirements and electrical margins for
>specific interfaces and verifying their correctness 
>- Designing and conducting detailed testing and measurements to collect
>data for validation and correlation of design analysis
>- Making recommendations to modify lab equipment and/or processes to
>establish or improve process feasibility and/or capability and 
>
>  increase efficiency
>
> 
>
> 
>
>Typically requires MSEE/Ph.D. combined with 5-7 years of related
>experience, or BSEE/CS combined with 7-10 yrs related experience.
>Proficiency with spice (or equivalent) circuit simulation, field-solver
>and time/frequency domain analysis, familiarity with high speed serdes
>design, PLL design and LVDS, SST, CML and other high-performance I/O
>technologies, ASIC design experience with I/O selection and
>simulation/validation, solid background on transmission line theory are
>necessary. In depth understanding of electromagnetics is plus.
>Experience with available CAD/CAE tools such as HSPICE, SiSoft, HFSS,
>CST, Sigrity Speed 2000, PowerSI,  Si-Wave, Paksi-E, Sentinel-PI, TDA,
>Apache Redhawk/CPM, Agilent ADS, and Cadence SI tools or related tools.
>Experience in correlating simulation results with lab measurements using
>oscilloscopes, TDRs, VNAs, and BertScope is a plus. Self motivation,
>teamwork and strong communication skills are essential.
>
>
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[SI-LIST] Re: Senior Signal Integrity Jobs at Cisco, San Jose, CA

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