[SI-LIST] SSTL and the series resistor
- From: Allan Davidson <allan.davidson@xxxxxxxxxxxxxxx>
- To: "si-list@xxxxxxxxxxxxx" <si-list@xxxxxxxxxxxxx>
- Date: Wed, 09 Jan 2002 17:25:23 -0800
Hi all:
Let's take the example of a motherboard with DRAMs on plug-in DIMM
cards, SSTL signaling levels, the bus on the motherboard parallel
terminated at both ends. It is my understanding that the series
resistors used in SSTL applications are there to effectively isolate the
stubs (caused by the DIMM traces) from signals traveling along the main
bus on the motherboard. Assuming that the series resistors are
physically on the DIMM, this would imply that they should be placed as
close as possible to the edge fingers, minimizing the stubs seen by the
main bus. Also, when a DIMM is driving, the series resistors reduce the
signal swing on the parallel-terminated main bus, resulting in faster
switching. First question, is my understanding pretty much correct, or
am I off-base here?
Recently, I have seen application notes for devices where the SSTL
series resistor appears to be integrated "on-chip". While I can see that
this will help with reducing the output swing, it seems to defeat the
stub-isolating purpose of the series resistor. Any stubs would now be on
the bus-side of the resistor rather than being hidden from the bus.
Second question, am I missing something here, or does integrating the
SSTL series resistor on-chip defeat one of it's main purposes?
I appreciate any insight you have. Thanks a lot!
Regards, Allan
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