[SI-LIST] SI job opening in Intel - Bangalore, India
- From: "Nanal, Sandesh" <sandesh.nanal@xxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Wed, 21 Mar 2007 09:40:43 +0530
There is an SI opening in my colleague's group which we are looking to
close ASAP; interested candidates can contact him directly (req not
approved for international relocation)
Govindaswamy.V.nallur@xxxxxxxxx
Signal Integrity Engineer - 530988
Description
In this position, you will be joining the Mobility Group MPHD's Signal
Integrity Team as a Signal Integrity Engineer. You will be working on
enabling platforms for mobile computing applications. Your
responsibilities will include but not be limited to:
* Performing memory (DDRx/GDDRx) and PCI-Express* Gen1/Gen2 signal
integrity analysis on all mobile platforms
* Representing mobile platforms in internal and external memory
kits and forums
* Developing and improving signal integrity methodologies for
memory and I/O Interfaces
* Developing and improving 2D and/or 3D circuit parameter
extraction and simulation flows for platform signal integrity and power
delivery analysis
* Developing and improving measurement capabilities for electrical
validation
* Interacting with Chipset, CPU and board design groups to
optimize design and implement routing guidelines
* Providing support for validation, collateral generation and
coordinating with key stakeholders
* Following up on deliverables, receivables and resolving
schedules issues
Qualifications
You must possess a Bachelor of Engineering degree with six years of
experience, or a Master of Science degree in Electrical Engineering with
five years of relevant experience. Additional qualifications include:
* Strong background in memory architecture and design, signal
integrity analysis, package design and analysis as well as
electro-magnetics
* Experience in analog I/O design, high-speed signal measurements,
signal integrity simulations and signal jitter analysis techniques, I/O
buffer margin testing and system validation methodology
* Experience in using HSPICE*, DOE/Jmp, PDA, ADS*, Cadence* CAD
and/or Allegro* design tools
* Good problem solving skills
* Strong commitment to task
* Good communication skills
* Good leadership skills to lead simulation teams and participate
in various internal and external electrical forums
* Working knowledge of PC bus architecture, time and/or FREQ
domain signal analysis equipment (digital real-time and/or sampling
scopes, BERT*, TDR and VNA) as well as hands-on programming skill (Perl)
would be an added advantage
best regards,
Sandesh Nanal
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