[SI-LIST] Re: SI impact on BGA Ball placement and pwr/gnd ratios

  • From: "Anil Pannikkat" <APANNIKK@xxxxxxxxxx>
  • To: <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 22 Oct 2003 18:06:42 -0700

Steve
 At this frequencies, you should be able to model the effects of
Signal-ground ball placements in Ansoft SI3D. Cross-Talk on single ended
nets might be one consideration other than impedance requirements.=20
Regards Anil

       Anil Pannikkat
        MTS Package Development         * : 408-544-7542
        Altera Corporation                      Fax: 408-544-6404
        101, Innovation Drive, M/S 4202 *: apannikk@xxxxxxxxxx
        San Jose, CA 95134              *: http://www.altera.com


-----Original Message-----
From: Steven M. Waldstein [mailto:swldstn@xxxxxxxxxxxx]=20
Sent: Wednesday, October 22, 2003 3:24 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: SI impact on BGA Ball placement and pwr/gnd
ratios


A follow up to my question below.

Has anyone created simulations that show the change ins
signal ball performance as a function of the distance
from signal ball to the return path ball on the package?
If so, how did you create your models?

Thanks again,

Steve Waldstein
swldstn@xxxxxxxxxxxx

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of swldstn@xxxxxxxxxxxx
Sent: Wednesday, October 22, 2003 9:14 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] SI impact on BGA Ball placement and pwr/gnd ratios


To all,

I am looking for any rules of thumb other component
designers are using for placing your external BGA
balls for signals along with power and ground.

In general we were using the rules that a signals
must be no farther than 2 away from a VSS if
the signals are < 100MHz and neighboring a VSS
if they are faster 100MHz or faster. I'm not sure
how to increasing the frequency up to 400 - 533 MHz
should be handled. I should also note I am concerned
with single ended interfaces like DDR-1 and DDR-II,
PCI, AGP, Processor front side buses, GMII, etc.
For differential signals we have different constraints.

We have not been too concerned with VCC ball placement but currently I
am thinking VCC balls ( which are not always the same number as VSS
balls) should be next to a VSS to reduce noise coupling to signals. My
thinking is that this will allow a place for mutual inductance to
terminate that is not a signal. Is this a valid assumption?

Any rules people have and are willing to share would be appreciated.

Steve Waldstein
swldstn@xxxxxxxxxxxx



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