[SI-LIST] Re: Resistive Leakage Paths
- From: "Mark Randol" <Mark.Randol@xxxxxxxxxx>
- To: "SI-List" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 22 May 2006 07:35:49 -0700
<deafening silence>
Just wondering. Inappropriate question, or just something no one has
dealt with?
--
Mark Randol
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx=20
> [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Mark Randol
> Sent: Friday, May 19, 2006 10:40 AM
> To: SI-List
> Subject: [SI-LIST] Resistive Leakage Paths
>=20
> Hello Listers,
>=20
> I hope this isn't too far off topic, but it is a PCB design=20
> related question. Not inductance or capacitance parasitics,=20
> but that other 'lumped passive element'.
>=20
> I know when hand soldering these little dears that the=20
> remaining flux can cause havoc due to the leakage currents. =20
> What's a 'typical' leakage resistance between the terminals=20
> on a 0402 package? =3D20
>=20
> From what I've seen, just the board itself is pretty good. =20
> Ceramic caps are typically pretty good as well. Assembly=20
> residues can be 100kohms or less.
>=20
> Regards,
> Mark Randol
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