[SI-LIST] Re: REG:Splitting LVDS signals into T topology
- From: steve weir <weirsi@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Mon, 22 Apr 2013 00:23:06 -0700
As in most things it depends. You need to evaluate based on your timing
requirements, the rise and fall times of your parts and your available
topology options.
There should be only one parallel termination. Where you place it will
determine the reflections that each load sees. Whatever you do keep the
bottom of the "T" electrically short compared to your rise / fall
times. In certain circumstances series damping resistors will help.
Steve.
On 4/22/2013 12:13 AM, Balajy Kumar -ERS, HCL Tech wrote:
> Hi
>
>
> I need to split the differential LVDS pair signals into a T-topology in my
> project. I have the following doubts.
>
>
>
> #is it advisable to split the differential LVDS pair signals into a
> T-topology?
>
>
>
> #regarding termination placement, whether one 100 ohms resistor could be
> placed at the T junction or 100 ohms each near the two receiver ICs in the
> T-topology.
>
>
>
> Thanks
>
> Balajy
>
>
>
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