[SI-LIST] Re: Questions Concerning BGA Mounting
- From: Pat Diao <Pat_Diao@xxxxxxxx>
- To: "'levinpa@xxxxxxxxxxxxx'" <levinpa@xxxxxxxxxxxxx>,"Reflector, SI-List" <si-list@xxxxxxxxxxxxx>
- Date: Thu, 6 Jun 2002 12:04:15 -0700
Hi Paul,
Here are my comments:
>1) How high is the air gap between the PCB and a mounted BGA part?
The elevation of the BGA depends on your ball size. For a typical BGA
package with 0.8-1.27mm ball pitch, the ball height after package reflow is
0.4-0.65mm.
>2) What material is typically used for BGA substrates? Any idea of its K
and loss tangent properties.
Material sets in substrate can very a lot. Typically there are BT for the
core, layers of prepreg, and Solder mask. Of course there are also ceramic
substrates.
Some properties,
BT k=4.5-4.7 Loss=0.007
Prepreg k=4.3 Loss=0.04
Solder mask k=4.2 Loss=0.03
Of course there is a +/- range for all the numbers depending on the
manufacturer and production lot.
>3) Are the traces on the substrate itself typically single layer, or does
the substrate use a multiple signal layer structure? (My device as a couple
hundred "pins.")
You don't usually have single layer substrate(there are exceptions). Two
and four layers are most common, and 6 or more layers are being constantly
used. "A couple hundred balls"? I guess most likely it is either 2 or 4
layers.
>4) TDR measurements indicate that there are two points of capacitance
when the package is mounted, one at the location of the "pin" and the
other (presumably) at the location of the chip. Does this sound right to
you experts?
Ball is capacitive for sure. The other could be at the die when you have
internal ground/pwr planes and die attach paddle.
I suggest that you get the substrate design from the vender otherwise there
are too many unknowns to have an accurate simulation.
Pat Diao, Ph.D.
Principal Engineer
Package Characterization and Development
ASAT Inc.
Fremont, CA
-----Original Message-----
From: Paul Levin [mailto:levinpa@xxxxxxxxxxxxx]
Sent: Thursday, June 06, 2002 10:25 AM
To: Reflector, SI-List
Subject: [SI-LIST] Questions Concerning BGA Mounting
Dear SI-List,
I'm trying to model some PCB traces that run underneath a BGA package
and the traces on the BGA substrate itself. If anyone could give me some
clues, I would really appreciate it.
1) How high is the air gap between the PCB and a mounted BGA part?
2) What material is typically used for BGA substrates? Any idea of its
K and loss tangent properties.
3) Are the traces on the substrate itself typically single layer, or does
the
substrate use a multiple signal layer structure? (My device as a couple
hundred "pins.")
4) TDR measurements indicate that there are two points of capacitance
when the package is mounted, one at the location of the "pin" and the
other (presumably) at the location of the chip. Does this sound right to
you experts?
Many thanks for your assistance.
Sincerely,
Paul
--
Paul A. Levin
Senior Principal Engineer
Xyratex, Manhattan Beach
(310) 372-7352 - home & office
(310) 291-8199 - cell
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