[SI-LIST] Re: Question about package models
- From: "Dagostino, Tom" <tom_dagostino@xxxxxxxxxxx>
- To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 23 Jul 2001 11:50:19 -0700
Chris
I was just suggesting an alternative to the issues discussed see (2).
Tom Dagostino
Modeling Manager
Mentor Graphics Corp.
SAE
tom_dagostino@xxxxxxxxxx
503-685-1613
-----Original Message-----
From: Chris Rokusek [mailto:crokusek@xxxxxxxxxxxx]
Sent: Monday, July 23, 2001 10:07 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Question about package models
Tom,
IBIS actually allows two methodologies for creating T-Line models:
1) EBD - Electrical Board Description
2) [Define Package Model]
In order to use an EBD model in a simulation tool, because of its
generality, the user may be required to provide more setup information (or
at least make more choices) than would be required had a PKG model been used
instead. In most instances, use #1 for Boards (e.g. SDRAM), use #2 for
packages to make things easier for end users.
Chris Rokusek
Innoveda
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
> [mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Dagostino, Tom
> Sent: Thursday, July 19, 2001 1:29 PM
> To: 'si-list@xxxxxxxxxxxxx'
> Subject: [SI-LIST] Re: Question about package models
>
>
>
> Don't forget about .ebd models, they have a non-coupled
> transmission line model.
>
> Tom Dagostino
> Modeling Manager
> Mentor Graphics Corp.
> SAE
> tom_dagostino@xxxxxxxxxx
> 503-685-1613
>
>
> -----Original Message-----
> From: Zabinski, Patrick J. [mailto:zabinski.patrick@xxxxxxxx]
> Sent: Thursday, July 19, 2001 12:41 PM
> To: si-list@xxxxxxxxxxxxx
> Subject: [SI-LIST] Re: Question about package models
>
>
>
>
> > Hi guys:
> > A couple of questions about the use of package models.
> >
> > 1) Do any of you use device package models when designing high-speed
> > boards?
>
> Absolutely. Depending upon the package, speed, technology,
> etc., the package can completely destroy the signal, and
> it's best to know/understand this and find work-arounds
> *before* the board is built.
>
> > 2) If so, what model is preferred, spice/RLC, S-parameter, other?
>
> Most of the time, we don't have much choice. IBIS provides
> simple lumped LRC, while some RF vendors supply S-parameters.
> If I have choice, I prefer a spice model that includes
> T-lines for "long" (as defined by the edge rate) traces/leads
> and lumped LRC for bond wires, vias, "short" leads, etc.
>
> > 3) If the package is controlled impedance and the device has on-chip
> > termination, would you still have a use for the package model?
>
> Again, yes. In most cases I've seen, if the vendor has
> gone through the effort/expense of controlled impedance package
> and on-chip termination, you're *likely* safe without
> simulation, but it's still worth the effort verification
> through simulation.
>
> >
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