[SI-LIST] Re: 答复: Power supply division on DDR2 interface
- From: Lucian Zhang <zhanglub@xxxxxxxxxx>
- To: 李鹏 <pengli@xxxxxxxxxxxx>
- Date: Sun, 13 Jun 2010 11:19:18 +0800
Li Peng,
Thank you.
My worry is not for the VREF design.
My DDR2 controller is supplied by a DC-DC converter, 8 DDR2 chips are
supplied by another DC-DC converter.
It is because each converter cannot supply sufficient current for both
controller and chips.
But in most DDR2 interface design, such as computers and laptops, the DDR2
interface of northbridge and DIMM connectors
are supplied by only one Power supply. That is, the Power of controller's
ddr2 interface and chips' ddr2 interface is
directly connected. With my personal experience, I am not gotten the case
of power supply division of controller and chips.
So, is there some risk for this power supply case?
Thank you.
Lucian
李鹏 <pengli@xxxxxxxxxxxx>
2010-06-13 10:25
To
"'Lucian Zhang'" <zhanglub@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
cc
Subject
答复: [SI-LIST] Power supply division on DDR2 interface
Hi,Lucian
You board have one or four DDR II memory ? If it have one or two memory
(for
light load that fewer than four DDR II components), I suggest that use two
1K_% resistance generate DDR II VREF.
In addition, maybe you use dc-dc power supply generate DDR II controller
and use LDO supply generate DDR II VTT ,VREF .
-----邮件原件-----
发件人: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
代表 Lucian Zhang
发送时间: 2010年6月13日 9:59
收件人: si-list@xxxxxxxxxxxxx
主题: [SI-LIST] Power supply division on DDR2 interface
Hi, all exports,
I have a DDR2 interface.
Its power supply of DDR2 controller is independently to that of DDR2
chips.
Controller's Vref is supplyed by chips' power, with a direct connection to
chips' Vref.
Will it be some problem in this Power?
Thanks for a lot.
Lucian
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