[SI-LIST] Re: Power handling
- From: jrbarnes@xxxxxxxxxxx
- To: hali@xxxxxxxxxxxxxx, si-list@xxxxxxxxxxxxx
- Date: Mon, 26 Nov 2001 18:01:29 -0500
Hassan,
A layout technique that I use for pins that will be carrying high currents is to
put elongated pads around the pins in every layer I can. These pads have from 1
up to 4 vias in them, tieing the barrel of the mounting hole, the pads, and the
power/ground plane together with a bunch of additional parallel paths. You do
have to be careful about how close these vias are to the mounting hole, because
the pads and vias can act as a heatsink during manual soldering/unsoldering of
the component.
For example, my most recent design that went into mass production is the
controller card for the Lexmark X820e Multi-Function Printer (see
http://www.lexmark.com/US/Products/printers/0,2792,MjM4OXwx,00.html ), a
6-layer card.
Our design groundrules require component mounting holes to have thermal vias
(wagon wheels) when
they go into planes, but can go solidly into the pads for traces, so that
pin-through-hole
components can be removed for repair. Vias, on the other hand, go into both
planes and pads
solidly because they don't need to be unsoldered. Our standard thermal via has
four 0.015"
wide by 0.012" long spokes coming out of it. The card lay-up is:
1. Topside component pads and vertical traces.
2. Ground.
3. Horizontal traces.
4. Vertical traces.
5. Partitioned power plane (+5V, +3.3V, +2.5V, and +VCC2 with a ground ring
around most of the
perimeter of the card).
6. Bottomside component pads and horizontal traces.
If I connect a high-current pin to the power/ground plane using the default
wiring
scheme, I have the barrel of the hole connected to the plane through four 0.015"
spokes in the
power/ground plane, for a minimum copper width of 0.060".
There is a quirk in our layout software that makes it difficult to put anything
but poured ground
in the ground layer. So my stackup for high-current power pins was:
1. Pad with two 0.024" diameter vias.
2. Blank.
3. Pad.
4. Pad.
5. Power plane, mounting hole with thermal via, vias in solidly.
6. Pad.
My stackup for high-current ground pins was:
1. Pad with two 0.024" diameter vias.
2. Ground plane, mounting hole with thermal via, vias in solidly.
3. Pad.
4. Pad.
5. Pad.
6. Pad.
At the power/ground plane, this makes my minimum copper width about:
(4 * 0.015") + (2 * pi * 0.024") = 0.210", about 3.5 times as wide as the
default connection.
Thus, for a few more minutes in layout, I roughly trebled the current-carrying
capacity of
the card at these power/ground pins, without hurting our ability to repair the
cards.
John Barnes Advisory Engineer
Lexmark International
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