[SI-LIST] Re: Power Distribution Design For Async Processor
- From: Sen Velmurugan <sen.velmurugan@xxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 31 May 2011 18:22:09 -0700
Hi Rick
> Also need to be vary of chips di/dt requirements, power switcher
> frequency/phases, feed back compensation network's BW and phase margin
> for a successful stable PDN. I think they are on your radar.
>
> Regards
> Sen
>
>
> Date: Sat, 28 May 2011 17:42:01 -0400
> From: Rick Collins <gnuarm.2006@xxxxxxxxx>
> Subject: [SI-LIST] Power Distribution Design For Async Processor
>
> Green Arrays is building chips of asynchronous processor arrays.
> "Varying capacitor values create impedance peaks as well as nulls in
> the frequency domain and should be avoided."
>
>
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