[SI-LIST] Package Layout Resource
- From: "John Ellis" <John.Ellis@xxxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 4 Oct 2007 05:01:49 -0700
Hi All,
I'm looking for recommendations for a package layout resource. This
would be for flip-chip and wire-bond applications. I'm looking for
someone who is thorough, thoughtful, familiar with manufacturing
limitations, familiar with SI and PI concepts, and able to meet promised
delivery dates.
Please respond to me at
jellis@xxxxxxxxxxxx
Thanks,
_________________________________________
John Ellis
Sr. Staff R & D Engineer
Mixed Signal I/O and
Physical Libraries Group
Synopsys, Inc.
7535 Windsor Drive
Suite B103
Allentown, PA 18195
Cel: 650-861-9277
Tel: 484-201-2212
email: jellis@xxxxxxxxxxxx
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